Low power memory allocation and mapping for area-constrained systems-on-chips

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• 作者：Manuel Strobel ; Marcus Eggenberger ; Martin Radetzki
• 刊名：EURASIP Journal on Embedded Systems
• 出版年：2017
• 出版时间：December 2017
• 年：2017
• 卷：2017
• 期：1
• 全文大小：868 KB
• 刊物主题：Signal, Image and Speech Processing;
• 出版者：Springer International Publishing
• ISSN：1687-3963
• 卷排序：2017

文摘

Large fractions of today’s embedded systems’ power consumption can be attributed to the memory subsystem. In order to reduce this fraction, we propose a mathematical model to optimize on-chip memory configurations for minimal power. We exploit the power reduction effect of splitting memory into subunits with frequently accessed addresses mapped to small memories. The definition of an integer linear programming model enables us to solve the twofold problem of allocating an optimal set of memory instances with varying size on the one hand and finding an optimal mapping of application segments to allocated memories on the other hand. Experimental results yield power reductions of up to 82 % for instruction memory and 73 % for data memory. Area usage, at the same time, deteriorates by only 2.1 %, respectively, 1.2 % on average and even improves in some cases. Flexibility and performance of our model make it a valuable tool for low power system-on-chip design, either for efficient design space exploration or as part of a HW/SW codesign synthesis flow.KeywordsInteger linear programmingILPLow powerOn-chip memorySRAMSystem-on-chipSoC