An active-RC reconfigurable lowpass-polyphase biquad filter for wireless receiver

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• 作者：C. Huang ; C. Chen ; M. J. Zhou ; J. H. Wu
• 关键词：Reconfigurable ; Polyphase ; filter ; SDR auto ; tuning ; Sallen ; Key ; Lowpass ; filter
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2015
• 出版时间：July 2015
• 年：2015
• 卷：84
• 期：1
• 页码：97-105
• 全文大小：2,553 KB
• 参考文献：1.Manku, T., et al. (2004) A single chip direct conversion CMOS transceiver for quad-band GSM/GPRS/EDGE and WLAN with integrated VCO’s and fractional N synthesizer. In IEEE Symposium on Radio Frequency Integrated Circuits (RFIC). Digest of Papers (pp. 423-26).
  2.Johns, D. A., & Martin, K. (Eds.). (1997). Analog integrated circuit design. New York: Wiley.
  3.Glossner, J., Iancu, D. S., Lu, J. (2003) A software-defined communications baseband design, IEEE Communications Magazine, Vol. 41(1) (pp. 120-28).
  4.Durham, A. M., & Huges, J. B. (1992). Circuit architecture for high linearity monolithic continuous-time filtering. IEEE Transactions on Circuits System, 39, 1270-276.
  5.Cho, T. B., Kang, D., Heng, C.-H., & Song, B. S. (2004). A 2.4-GHz dual-mode 0.18-μm CMOS transceiver for Bluetooth and 802.1lb. IEEE Journal of Solid-State Circuits, 39(11), 1916-926.View Article
  6.Williams, A. B. (1981). Electronic filter design handbook (pp. 87-8). New York: McGraw-Hill.
  7.Behbahani, F., Kishigami, Y., Leete, J., & Abidi, A. A. (2001). CMOS mixers and polyphase filters for large image rejection. IEEE Journal of Solid-State Circuits, 36, 873-87.View Article
  8.Stevenson, J., & Sánchez-Sinencio, E. (1998). An accurate quality factor tuning scheme for IF and high-Q continuous-time filters. IEEE Journal of Solid-State Circuits, 33(12), 1970-978.View Article
  
• 作者单位：C. Huang (1)
  C. Chen (1)
  M. J. Zhou (1)
  J. H. Wu (1)
  
  1. National ASIC System Engineering Center, Southeast University, Nanjing, 210096, People’s Republic of China
  
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems
  Electronic and Computer Engineering
  Signal,Image and Speech Processing
  
• 出版者：Springer Netherlands
• ISSN：1573-1979

文摘

A novel reconfigurable lowpass-polyphase biquad filter based on MFB structure is proposed in this paper. In this biquad, only one op-amp is adopted which improves the matching and reduces the power consumption. And its transmission function is synthesized by the complex signal flow graph. Then a 3rd order filter used in Zigbee transceiver is implemented to illustrate the technique, which is realized in 0.13?μm CMOS technology. To avoid the variation of resistance and capacitance, an on-chip tuning scheme is integrated. The test results show that when in polyphase mode, it is centered at 2?MHz with 3?MHz bandwidth and the image rejection is about 23?dB with the voltage gain of 12?dB. When in lowpass mode, the cut-off frequency is 1.5?MHz, and the DC gain is 12?dB. The in-band 3rd order input intercept point (IIP3) is 9?dBm in polyphase mode and 13?dBm in lowpass mode. Attractively, the filter only consumes 2.3?mA with a 1.2?V power supply, and occupies an area of 0.26?mm2.