Design of a single-ended energy efficient data-dependent-write-assist dynamic (DDWAD) SRAM cell for improved stability and reliability

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• 作者：Ajay Kumar Singh ; Mohammadsadegh Saadatzi…
• 关键词：Data ; dependent ; Dynamic/static power consumption ; Write/read operation ; SRAM cell ; Write ability and read static noise margin
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：90
• 期：2
• 页码：411-426
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems; Electrical Engineering; Signal,Image and Speech Processing;
• 出版者：Springer US
• ISSN：1573-1979
• 卷排序：90

文摘

A data-dependent write-assist dynamic (DDWAD) SRAM cell is proposed to reduce the power consumption and enhance the relaibility against process, voltage, temperature variation and aging effect under static stress. The cell has distinct read and write circuits with single bit line for respective operations which improve the read stability. In the cell, write operation is performed using separate write signal WS instead of wordline WL. The write signal WS is introduced to reduce the discharging actvity at the write bit line BL to reduce the dynamic power consumption. The latch property of the cell is disabled during write operation to flip the data faster at the storage nodes. The proposed design approach provides high immunity to the data-dependent bit line leakage and results in lower voltage drop on BL, lower leakage current and lower parasitic capacitance. The proposed cell consumes approximately 60.4 % lower write power and 52.8 % read power compared to the other cells. The storage node does not float during read operation and thus cell is not sensitive to any positive noise. The data in the cell can be maintained even if the power supply is reduced to 300 mV.