A complete analysis and measurement results of the threshold voltage cancellation scheme for RF to DC converter

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• 作者：Shailesh Singh Chouhan ; Kari Halonen
• 关键词：RF energy harvesting ; UHF ; Threshold voltage cancellation ; Rectifier ; Voltage multiplier
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2016
• 出版时间：May 2016
• 年：2016
• 卷：87
• 期：2
• 页码：223-233
• 全文大小：1,284 KB
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• 作者单位：Shailesh Singh Chouhan (1)
  Kari Halonen (1)
  
  1. Department of Micro and Nano Sciences, Aalto University, Espoo, Finland
  
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems
  Electronic and Computer Engineering
  Signal,Image and Speech Processing
  
• 出版者：Springer Netherlands
• ISSN：1573-1979

文摘

In this work, the threshold voltage cancellation scheme for the RF-to-DC converter used in RF energy harvesting is presented. The proposed scheme reduces the threshold voltage of PMOS transistor used in CMOS rectifier with the use of additional CMOS components. The performance of the proposed scheme is evaluated against the conventional CMOS rectifier in terms of the power conversion efficiency (PCE). Measurements were done at 433 MHz RF frequency for resistive load values ranging from 1 to 120 K\(\Omega\). The measured peak PCE of the conventional CMOS and proposed rectifiers are 16 and 35 %, respectively, for the input RF power level of \(-8\) dBm and resistive load of value 10 K\(\Omega\). The implementation of the proposed scheme is also tested in the multi-stage rectifier circuit (MSC) topology. All PMOS-based DTMOS-biased MSC circuit was selected to implement the proposed scheme and for performance comparison. The measured results show the PCE of a five stage DTMOS-biased MSC circuit is 15 % @ \(-6\) dBm with 66 K\(\Omega\) resistive load whereas after implementing proposed scheme on the alternate PMOS transistors of DTMOS-biased MSC circuit resulted into 19 % PCE for the same input and output conditions.