Exploiting UML based validation for compliance checking of TLM 2 based models

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• 作者：Vaibhav Jain (1) vjain@cse.iitd.ac.in
  Anshul Kumar (1) akumar@cse.iitd.ac.in
  Preeti Panda (1) panda@cse.iitd.ac.in
• 关键词：Transaction level modeling – ; TLM compliance checking – ; UML based validation
• 刊名：Design Automation for Embedded Systems
• 出版年：2012
• 出版时间：June 2012
• 年：2012
• 卷：16
• 期：2
• 页码：93-113
• 全文大小：876.4 KB
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• 作者单位：1. Indian Institute of Technology, Delhi, 110016 India
• ISSN：1572-8080

文摘

SoC system designers commonly employ SystemC based Transaction level modeling (TLM) for its early software development usage and its analysis capabilities. TLM helps in realizing a SoC using virtual prototyping by integration of SoC components at different abstraction levels. The TLM 2 standard introduces interoperability rules for the models that may have been developed independently. However, neither SystemC compiler nor TLM library supports checking of such rules and manually debugging interoperability errors in such models could be a major problem. This provides motivation for developing automatic compliance checking techniques which can detect and report such errors. As the models are refined to incorporate detailed intercommunication protocols among the system components, the need for compliance checking extends to these protocols as well. In this paper, we present an efficient UML based compliance checking technique for TLM 2 models which supports static, dynamic and protocol-specific rule checking.