Heterogeneous computing architecture for fast detection of SNP-SNP interactions

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• 作者：Davor Sluga (2)
  Tomaz Curk (2)
  Blaz Zupan (2) (3)
  Uros Lotric (2)
  
  2. Faculty of Computer and Information Science ; University of Ljubljana ; Trzaska 25 ; SI 1000 ; Ljubljana ; SI ; Slovenia
  3. Department of Molecular and Human Genetics ; Baylor College of Medicine ; One Baylor Plaza ; TX 77030 ; Houston ; USA
  
• 关键词：SNP ; SNP interactions ; Genome ; wide association studies ; Graphic processing unit ; Many Integrated Core coprocessor ; Intel Xeon Phi ; CUDA
• 刊名：BMC Bioinformatics
• 出版年：2014
• 出版时间：December 2014
• 年：2014
• 卷：15
• 期：1
• 全文大小：1,561 KB
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• 刊物主题：Bioinformatics; Microarrays; Computational Biology/Bioinformatics; Computer Appl. in Life Sciences; Combinatorial Libraries; Algorithms;
• 出版者：BioMed Central
• ISSN：1471-2105

文摘

Background The extent of data in a typical genome-wide association study (GWAS) poses considerable computational challenges to software tools for gene-gene interaction discovery. Exhaustive evaluation of all interactions among hundreds of thousands to millions of single nucleotide polymorphisms (SNPs) may require weeks or even months of computation. Massively parallel hardware within a modern Graphic Processing Unit (GPU) and Many Integrated Core (MIC) coprocessors can shorten the run time considerably. While the utility of GPU-based implementations in bioinformatics has been well studied, MIC architecture has been introduced only recently and may provide a number of comparative advantages that have yet to be explored and tested. Results We have developed a heterogeneous, GPU and Intel MIC-accelerated software module for SNP-SNP interaction discovery to replace the previously single-threaded computational core in the interactive web-based data exploration program SNPsyn. We report on differences between these two modern massively parallel architectures and their software environments. Their utility resulted in an order of magnitude shorter execution times when compared to the single-threaded CPU implementation. GPU implementation on a single Nvidia Tesla K20 runs twice as fast as that for the MIC architecture-based Xeon Phi P5110 coprocessor, but also requires considerably more programming effort. Conclusions General purpose GPUs are a mature platform with large amounts of computing power capable of tackling inherently parallel problems, but can prove demanding for the programmer. On the other hand the new MIC architecture, albeit lacking in performance reduces the programming effort and makes it up with a more general architecture suitable for a wider range of problems.