Heterogate junctionless tunnel field-effect transistor: future of low-power devices

详细信息    查看全文

• 作者：Shiromani Balmukund Rahi ; Pranav Asthana…
• 关键词：Heterogate ; JLTFET ; Displacement vector ; High ; k ; Low ; k ; Tunneling width ; MOSFET ; Gate work function
• 刊名：Journal of Computational Electronics
• 出版年：2017
• 出版时间：March 2017
• 年：2017
• 卷：16
• 期：1
• 页码：30-38
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Appl.Mathematics/Computational Methods of Engineering; Electrical Engineering; Theoretical, Mathematical and Computational Physics; Optical and Electronic Materials; Mechanical Engineering;
• 出版者：Springer US
• ISSN：1572-8137
• 卷排序：16

文摘

Gate dielectric materials play a key role in device development and study for various applications. We illustrate herein the impact of hetero (high-k/low-k) gate dielectric materials on the ON-current (\(I_{\mathrm{ON}}\)) and OFF-current (\(I_{\mathrm{OFF}}\)) of the heterogate junctionless tunnel field-effect transistor (FET). The heterogate concept enables a wide range of gate materials for device study. This concept is derived from the well-known continuity of the displacement vector at the interface between low- and high-k gate dielectric materials. Application of high-k gate dielectric material improves the internal electric field in the device, resulting in lower tunneling width with high \(I_{\mathrm{ON}}\) and low \(I_{\mathrm{OFF}}\) current. The impact of work function variations and doping on device performance is also comprehensively investigated.