An edge-based dual adaptive decision feedback equalizer for Gbps serial links

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• 作者：Alaa R. AL-Taee ; Matthew Dolan…
• 关键词：Serial links ; Decision feedback equalizers (DFEs) ; Edge DFE ; CMOS circuits and systems
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：90
• 期：2
• 页码：399-409
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems; Electrical Engineering; Signal,Image and Speech Processing;
• 出版者：Springer US
• ISSN：1573-1979
• 卷排序：90

文摘

This paper presents an adaptive edge-DFE for 2PAM Gbps serial links. The optimal tap coefficients of the DFE are obtained by minimizing the jitter of received data. Reference voltage for generating DFE error signal is also obtained iteratively using an edge-DFE like algorithm. Issues critical to the proposed adaptive edge-DFE are examined in detail. The effectiveness of the proposed adaptive edge-DFE has been validated using a 5 Gbps serial link designed in a 65 nm 1.2 V CMOS technology. The effect of PVT (process, voltage, and temperature) variations on the performance of the proposed DFE has also been investigated. Simulation results demonstrate that the DFE is capable of opening completely closed data eyes when the DFE is absent. Equalized data have 55 % vertical-opening and 86.5 % horizontal eye-opening with 25 ns adaption time.