A Fast-Settling Three-Stage Amplifier Using Regular Miller Plus Reversed Indirect Compensation

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• 作者：Cheng Song ; Zhangming Zhu ; Yintang Yang
• 关键词：Three ; stage amplifier ; Switched capacitor ; Miller compensation ; Fast settling
• 刊名：Circuits, Systems, and Signal Processing
• 出版年：2017
• 出版时间：February 2017
• 年：2017
• 卷：36
• 期：2
• 页码：795-810
• 全文大小：
• 刊物类别：Engineering
• 刊物主题：Circuits and Systems; Electrical Engineering; Signal,Image and Speech Processing; Electronics and Microelectronics, Instrumentation;
• 出版者：Springer US
• ISSN：1531-5878
• 卷排序：36

文摘

A novel frequency compensation technique, named Regular Miller plus Reversed Indirect Compensation (RMRIC), is presented in this paper for fast-settling three-stage amplifiers. The RMRIC topology includes, on the one hand, a Miller capacitor combined with one nulling resistor connected between the first stage and the third stage, and on the other hand, an indirect compensation capacitor in series with a resistor added between the first and the second stage, which improves remarkably the performance such as gain–bandwidth product (GBW) and sensitivity of the proposed amplifier. Detailed design considerations are carried out to demonstrate the stability of the compensation technique. Circuit simulation results show the amplifier driving a 2-pF load capacitance achieves a 9.25-GHz GBW dissipating only 16.5 mW with a 1.2 V supply voltage using a TSMC 65 nm CMOS technology, which shows a significant improvement in figure of merits. The implemented amplifier reaches a settling time of 3.35 ns with 0.006 % accuracy.