摘要
Traditional approaches considered the collection capacity of CMOS photodiodes to be primarily related to the size of the photoactive area directly exposed to illumination. However, continuous downscaling favored by advanced CMOS technologies permits the fabrication of very small photodiodes in which the lateral collection through the sidewalls of the depletion region becomes a significant component of the overall photocurrent. In this paper, we will develop a 2D fully analytical compact model of this lateral current as a function of the device dimensions and the total collecting area surrounding the active area. It will be shown that there is a trade-off between these two magnitudes in terms of collection efficiency.