A Simulink-based hybrid codesign tool for rapid prototyping of FPGA's in signal processing systems

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• 作者：Reyneri ; L.M.
• 关键词：HW/SW codesign ; Simulink HW compilation ; High-level languages ; Analog cosimulation ; UMTS spreader ; Solving partial differential equations ; Common rail test bench
• 刊名：Microprocessors and Microsystems
• 出版年：2004
• 期刊代码：129_01419331
• 类别：et
• 出版时间：August 2, 2004
• 卷：28
• 期：5-6
• 页码：273-289
• 文件大小：717 K

摘要

This paper describes a novel codesign tool for rapid prototyping FPGA's in hybrid systems (HW+SW+analog+RF+electromechanical+user interface). This tool uses Simulink™ from The Mathworks as a high level description language, as well as a flexible simulation environment.