A modular and efficient hardware architecture for particle swarm optimization algorithm

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• 作者：Girma S. Tewolde^a ; ^{gtewolde@kettering.edu}  ; [Author Vitae] ; Darrin M. Hanna^b  ; [Author Vitae] ; Richard E. Haskell^b  ; [Author Vitae]
• 关键词：Particle Swarm Optimization (PSO) ; Embedded systems ; Microcontroller ; Field Programmable Gate Array (FPGA) ; Parallelization
• 刊名：Microprocessors and Microsystems
• 出版年：2012
• 期刊代码：129_01419331
• 类别：et
• 出版时间：June, 2012
• 卷：36
• 期：4
• 页码：289-302
• 文件大小：666 K

摘要

Particle Swarm Optimization (PSO), a population based optimization algorithm, has recently been attracting the attention of the embedded computing community. It is an efficient tool for many continuous multimodal and multidimensional problem classes. This paper first evaluates the performance of the PSO algorithm on embedded processor platforms with limited computational resources. The results on such platforms demonstrate the lack of sufficient execution speed for real-time applications. Thus, to address the shortcomings of the software PSO we developed a hardware architecture that significantly accelerates its execution performance. Besides improving the execution efficiency, the design is shown to be modular, flexible and reusable for solving different optimization problems. The accelerated execution performance of the proposed architecture is demonstrated on standard mathematical benchmark functions as well as on a real world problem scenario: emission source localization in distributed sensor networks. A parallelization scheme for further speed-up of the hardware PSO is also demonstrated.