20 nm Gate length Schottky MOSFETs with ultra-thin NiSi/epitaxial NiSi₂ source/drain

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• 作者：L. Knoll^a ; ^{l.knoll@fz-juelich.de} ; Q.T. Zhao^a ; R. Luptak^a ; S. Trellenkamp^a ; K.K. Bourdelle^b ; S. Mantl^a
• 关键词：Schottky-MOSFET ; High-k ; Scaling ; NiSi ; Epitaxial NiSi2 ; Short channel effects ; Silicide source/drain ; Implantation into silicide ; Dopant segregation
• 刊名：Solid-State Electronics
• 出版年：2012
• 期刊代码：73_00381101
• 类别：ph
• 出版时间：May, 2012
• 卷：71
• 期：Complete
• 页码：88-92
• 文件大小：1040 K

摘要

Schottky barrier (SB)-MOSFETs with NiSi and epitaxial NiSi₂ S/D contacts with gate lengths as small as 20 nm are presented. Epitaxial NiSi₂ FETs show higher on-currents than corresponding NiSi devices due to its lower SB height. A striking observation is that tunnelling currents through the fairly large SB decrease at very short gate lengths in SB-MOSFETs, in contrast to the scaling behavior of conventional MOSFETs. Simulations indicate that the potential in the channel increases due to overlap of the high source and drain barriers with decreasing gate length, leading to lower currents. Boron implantation into the silicide (IIS) was used to lower the SBH. Devices with epitaxial NiSi₂ show an improved performance after barrier lowering by (IIS). It is shown, that the parasitic potential increase of the two S/D Schottky barriers can be either minimized by IIS and by enhanced gate control due to EOT scaling using high-k as the gate oxide.