NiPt salicide process improvement for 28 nm CMOS with Pt(10%) additive

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• 作者：Jerander Lai ; ^{jerander_lai@umc.com} ; Yi-Wei Chen ; Nien-Ting Ho ; Yu Shan Shiu ; J.F. Lin ; Shuen Chen Lei ; Nick Z.H. Chang ; Ling Chun Chou ; C.C. Huang ; J.Y. Wu
• 关键词：NiPt ; BVC ; Leakage ; Thermal budget ; SBH
• 刊名：Microelectronic Engineering
• 出版年：2012
• 期刊代码：91_01679317
• 类别：cp
• 出版时间：April, 2012
• 卷：92
• 期：Complete
• 页码：137-139
• 文件大小：706 K

摘要

This study successfully demonstrates 50-80%NiSi defect reduction and P-FET 3%leakage improvement using Pt(10 at.%) additive for 28 nm node silicide process. Additionally, this study also discovers that lower thermal budget is required for getting same thick NiSi and better NiSi Rs distribution with higher concentration of Pt additive.