Power- and time-aware buffer cache management for real-time embedded databases

详细信息	查看全文 | 推荐本文 |

• 作者：Woochul Kang^a ; ^{wk5f@virginia.edu}  ; [Author Vitae] ; Sang H. Son^b  ; [Author Vitae]
• 关键词：Real-time database ; Embedded database ; Buffer cache management ; Power-awareness ; Time awareness ; Feedback control
• 刊名：Journal of Systems Architecture
• 出版年：2012
• 期刊代码：81_13837621
• 类别：cp
• 出版时间：June-August, 2012
• 卷：58
• 期：6-7
• 页码：233-246
• 文件大小：600 K

摘要

Due to the explosive increases of data from both the cyber and physical worlds, the demand for database support in embedded systems is increasing. Databases for embedded systems, or embedded databases, are expected to provide timely in situ data services under various resource constraints, such as limited energy. However, traditional buffer cache management schemes, in which the primary goal is to minimize the number of I/O operations, is problematic since they do not consider the constraints of modern embedded devices such as limited energy and distinctive underlying storage. In particular, due to asymmetric read/write characteristics of flash memory-based storage of modern embedded devices, minimum buffer cache misses neither coincide with minimum power consumption nor minimum I/O deadline misses. In this paper we propose a novel power- and time-aware buffer cache management scheme for embedded databases. A novel multi-dimensional feedback control architecture is proposed and the characteristics of underlying storage of modern embedded devices is exploited for the simultaneous support of the desired I/O power consumption and the I/O deadline miss ratio. We have shown through an extensive simulation that our approach satisfies both power and timing requirements in I/O operations under a variety of workloads while consuming significantly smaller buffer space than baseline approaches.