Enhancement of FinFET performance using 25-nm-thin sidewall spacer grown by atomic layer deposition

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• 作者：Kazuhiko Endo ; ^{endo.k@aist.go.jp} ; Yuki Ishikawa ; Takashi Matsukawa ; Yongxum Liu ; Shin-ichi O&rsquo ; uchi ; Kunihiro Sakamoto ; Junichi Tsukada ; Hiromi Yamauchi ; Meishoku Masahara
• 关键词：FinFET ; Sidewall spacer ; Parasitic resistance ; Atomic layer deposition
• 刊名：Solid-State Electronics
• 出版年：2012
• 期刊代码：73_00381101
• 类别：ph
• 出版时间：August, 2012
• 卷：74
• 期：Complete
• 页码：13-18
• 文件大小：1260 K

摘要

We report on performance enhancement of FinFETs with a 25-nm-short extension of the source/drain by using atomic layer deposition (ALD) of SiO₂ thin films for the side-wall spacer (SWS) of the gate electrode. Recently, the higher parasitic resistance (R_para) of the source/drain region due to the narrow fin width is one of the issues to be solved for the FinFET devices. In this study, the performance of the FinFETs has been successfully improved by the reduction of the parasitic resistance using the ALD-SWS.