Limit cycle behavior in a class-AB second-order square root domain filter

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• 作者：Carlos A. De La Cruz-Blas (1) carlos.aristoteles@unavarra.es
  Orla Feely (2) orla.feely@ucd.ie
• 关键词：Square ; root domain filters &#8211 ; Companding filters &#8211 ; Limit cycle &#8211 ; Nonlinear dynamics &#8211 ; Analog integrated circuits
• 刊名：Analog Integrated Circuits and Signal Processing
• 出版时间：August 2011
• 出版年：2011
• 期刊代码：5_09251030
• 类别：bio
• 卷：68
• 期：2
• 页码：175-181
• 数据来源：sp

摘要

This article shows how an unwanted limit cycle can be exhibited by a second-order CMOS companding filter. The filter employs the quasi-quadratic law of the MOS transistor in strong inversion and saturation to achieve compression together with a class-AB topology to extend the dynamic range. In the zero-input case, the filter operates in the manner expected of an externally-linear circuit. However, when a standard linear IC design technique is applied to it, unwanted zero-input sustained oscillations may be observed. Simulations from PSpice and measurement results from a semi-custom realization in a 0.8 μm CMOS process are used to explore this behavior. This work highlights an aspect of the behavior of such filters that must be taken into account by analog designers.