Arbitrary Two-Pattern Delay Testing Using a Low-Overhead Supply Gating Technique
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- 作者：Swarup Bhunia ; Hamid Mahmoodi ; Arijit Raychowdhury and Kaushik Roy
- 关键词：Delay fault testing ; Enhanced scan ; Two ; pattern testing ; Supply gating
- 刊名：Journal of Electronic Testing
- 出版时间：December, 2008
- 出版年：2008
- 期刊代码：18_09238174
- 类别：soc
- 卷：24
- 期：6
- 页码：577-590
- 数据来源：sp
摘要
With increasing defect density and process variations in nanometer technologies, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. This paper presents a novel test technique based on supply gating, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overhead. Experimental results on a set of ISCAS89 benchmarks show an average reduction of 34%in area overhead with an average improvement of 65%in delay overhead and 90%in power overhead during normal mode of operation, compared to the enhanced scan implementation.