基于两步多位量化技术的SC Σ-Δ调制器及其非理想特性的建模
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摘要
针对Σ-Δ调制器在多位量化情况下存在各种量化噪声和不稳定性的问题,提出了一种基于2步多位量化技术的SCΣ-Δ调制器结构,它由考虑了SCΣ-Δ调制器的非理想特性的一组模型构成。首先,把A/D转换划分成2个时间步长来获得较高的分辨率而又不降低速率;其次,对构成SCΣ-Δ调制器各部分的非理想特性如采样抖动、开关热噪声和运算放大器的参数从数学上进行了建模,并对其运行特征在MATLAB Simulink中进行了分析验证;最后,对一个采用2步多位量化技术的二阶SCΣ-Δ调制器的仿真结果表明,提出的Δ-Σ调制器结构模型不但能够获得较高的信噪比和分辨率,而且能够保证系统稳定运行和高可靠性,获得输出信号较大的动态范围。
In view of the issue about various quantization noise and instability for Σ-Δ modulator existing in multibit quantization condition,a SC Σ-Δ modulator system structure based on the two step multibit quantization technology is proposed in this paper. It consists of a set of models which takes into account the SC Σ-Δ modulator nonideal characteristics. Firstly,the A/D conversion is divided into two time steps to obtain a higher resolution without reducing the rate. Secondly,the various nonideal characteristics,such as sampling jitter, switchs thermal noise and amplifier parameters, from each part of the SC Σ-Δ modulator are modelled mathematically,and their behaviour is analysed and verified in MATLAB Simulink. Finally,simulation results on a second-order SCΣ-Δ modulator with two step quantization show that the proposed SC Σ-Δ modulator structure model can not only achieve higher signalto-noise ratio and resolution,but also can ensure the steady operation and high reliability of the system and achieve larger dynamic range of output signal.
In view of the issue about various quantization noise and instability for Σ-Δ modulator existing in multibit quantization condition,a SC Σ-Δ modulator system structure based on the two step multibit quantization technology is proposed in this paper. It consists of a set of models which takes into account the SC Σ-Δ modulator nonideal characteristics. Firstly,the A/D conversion is divided into two time steps to obtain a higher resolution without reducing the rate. Secondly,the various nonideal characteristics,such as sampling jitter, switchs thermal noise and amplifier parameters, from each part of the SC Σ-Δ modulator are modelled mathematically,and their behaviour is analysed and verified in MATLAB Simulink. Finally,simulation results on a second-order SCΣ-Δ modulator with two step quantization show that the proposed SC Σ-Δ modulator structure model can not only achieve higher signalto-noise ratio and resolution,but also can ensure the steady operation and high reliability of the system and achieve larger dynamic range of output signal.
引文
[1]郭先清,林凡,吴孙桃.三阶级联Sigma-Delta调制器设计[J].微电子学与计算机,2007,24(1):66-68,72.GUO X Q,LIN F,WU S T.Design of third order cascade sigma-delta modulator[J].Microellectronics&Computer,2007,24(1):66-68,72.
[2]王英俊,王武,王骞.不确定Sigma-Delta调制器的鲁棒滤波[J].福州大学学报(自然科学版),2013,41(1):59-65.WANG Y J,WANG W,WANG Q.Robust filtering for uncertain sigma-delta modulators[J].Journal of Fuzhou University(Natural Science Edition),2013,41(1):59-65.
[3]曹桂平.高精度Sigma-Delta调制器研究及ASIC实现[D].合肥:中国科学技术大学,2012.CAO G P.Study and ASIC implementation of highresolution sigma-delta modulator[D].Hefei:University of Science and Technology of China,2012.
[4]李仲秋.基于累加器结构的Delta-Sigma的调制器的噪声分析[J].电子工程师,2008,34(6):43-46.LI ZH Q.Noise analysis for delta-sigma modulator based on accumulator[J].Electronic Engineer,2008,34(6):43-46.
[5]胡礼扬,王军.Δ-Σ频率合成器带外量化噪声抑制技术[J].西南科技大学学报,2014,29(4):47-51.HU L Y,WANG J.Out-of-band quantization noise suppression technique forΔ-Σfrequency synthesizers[J].Journal of Southwest University of Science and Technology,2014,29(4):47-51.
[6]庞世甫,王继安,龚敏,等.Σ-Δ调制器的六阶噪声整形算法[J].电子与封装,2007,79(2):23-26,37.PANG SH F,WANG J AN,GONG M,et al.A six-order noise shaping algorithm used inΣ-ΔADC[J].Electronics&Packaging,2007,79(2):23-26,37.
[7]刘富锐,孟晓风.单环四阶Sigma-Delta调制器噪声传递函数设计[J].微电子学与计算机,2016,33(10):68-71,77.LIU F R,MENG X F.Design of a noise transfer function for sigma-delta modulator[J].Microellectronics&Computer,2016,33(10):68-71,77.
[8]王江涛,李海启,宋焱,等.2.2 MHz,8.3 m W多位量化连续时间Sigma-Delta调制器设计[J].微电子学与计机,2014,31(8):10-14转19.WANG J T,LI H Q,SONG Y,et al.A 2.2 MHz,8.3 m W multi-bit continuous-time sigma-delta modulator[J].Microellectronics&Computer,2014,31(8):10-14,19.
[9]欧伟,吴晓波.高精度低功耗多位量化Σ-Δ调制器的设计[J].机电工程,2008,25(12):27-30.OU W,WU X B.Design of a high resolution low power multi-bitΣ-Δmodulator[J].Mechanical&Electrical Engineering Magazine,2008,25(12):27-30.
[10]徐思龙,李宗伟,丛宁.采用DWA技术的多位Σ-Δ调制器的设计[J].微电子学与计算机,2015,32(1):140-145.XU S L,LI Z W,CONG N.MultibitΣ-Δmodulator with data weighted averaging technique[J].Microellectronics&Computer,2015,32(1):140-145.
[11]石立春,杨银堂,李迪,等.高精度音频多位SigmaDelta调制器设计[J].中南大学学报(自然科学版),2010,41(2):592-599.SHI L CH,YANG Y T,LI D,et al.Design of highresolution audio multibit sigma-delta modulator[J].Journal of Central South University(Science and Technology),2010,41(2):592-599.
[12]杨文荣,程媛媛.多位数字delta-sigma调制器的设计[J].电子测量技术,2007,30(5):11-13.YANG W R,CHENG Y Y.Design of multi-bit digital delta-sigma modulator[J].Electronic Measurement Technology,2007,30(5):11-13.
[13]PAOLO M,SALVATORE L.Analysis of VCO phasenoise in charge-pump phase-locked loops[J].IEEE Transactions on Circuits and Systems-I:Regular Papers,2012,59(10):2165-2175.
[14]LIU X,JIN J,LI X,et al.Glitch-free multi-modulus frequency divider for quantization noise suppression in fractional-N PLLs[C].Proceedings of InternationalSymposium on Circuits and Systems,2011:478-481.
[15]FUJCIK L,VRBA R.MATLAB Model of 16-bit switchedcapacitor sigma-delta modulator with twostep quantization process[J].IEEE Transactions on Circuits and System,2014,35(7):68-77.
[16]WU F,CHEN Z J,ZHAO M,et al.A new op-amp noise model for switched-capacitor sigma-delta modulator in simulink[C].Proceedings of IEEE International Conference on Electron Devices&Solid-state Circuits,2015:1-2.
[2]王英俊,王武,王骞.不确定Sigma-Delta调制器的鲁棒滤波[J].福州大学学报(自然科学版),2013,41(1):59-65.WANG Y J,WANG W,WANG Q.Robust filtering for uncertain sigma-delta modulators[J].Journal of Fuzhou University(Natural Science Edition),2013,41(1):59-65.
[3]曹桂平.高精度Sigma-Delta调制器研究及ASIC实现[D].合肥:中国科学技术大学,2012.CAO G P.Study and ASIC implementation of highresolution sigma-delta modulator[D].Hefei:University of Science and Technology of China,2012.
[4]李仲秋.基于累加器结构的Delta-Sigma的调制器的噪声分析[J].电子工程师,2008,34(6):43-46.LI ZH Q.Noise analysis for delta-sigma modulator based on accumulator[J].Electronic Engineer,2008,34(6):43-46.
[5]胡礼扬,王军.Δ-Σ频率合成器带外量化噪声抑制技术[J].西南科技大学学报,2014,29(4):47-51.HU L Y,WANG J.Out-of-band quantization noise suppression technique forΔ-Σfrequency synthesizers[J].Journal of Southwest University of Science and Technology,2014,29(4):47-51.
[6]庞世甫,王继安,龚敏,等.Σ-Δ调制器的六阶噪声整形算法[J].电子与封装,2007,79(2):23-26,37.PANG SH F,WANG J AN,GONG M,et al.A six-order noise shaping algorithm used inΣ-ΔADC[J].Electronics&Packaging,2007,79(2):23-26,37.
[7]刘富锐,孟晓风.单环四阶Sigma-Delta调制器噪声传递函数设计[J].微电子学与计算机,2016,33(10):68-71,77.LIU F R,MENG X F.Design of a noise transfer function for sigma-delta modulator[J].Microellectronics&Computer,2016,33(10):68-71,77.
[8]王江涛,李海启,宋焱,等.2.2 MHz,8.3 m W多位量化连续时间Sigma-Delta调制器设计[J].微电子学与计机,2014,31(8):10-14转19.WANG J T,LI H Q,SONG Y,et al.A 2.2 MHz,8.3 m W multi-bit continuous-time sigma-delta modulator[J].Microellectronics&Computer,2014,31(8):10-14,19.
[9]欧伟,吴晓波.高精度低功耗多位量化Σ-Δ调制器的设计[J].机电工程,2008,25(12):27-30.OU W,WU X B.Design of a high resolution low power multi-bitΣ-Δmodulator[J].Mechanical&Electrical Engineering Magazine,2008,25(12):27-30.
[10]徐思龙,李宗伟,丛宁.采用DWA技术的多位Σ-Δ调制器的设计[J].微电子学与计算机,2015,32(1):140-145.XU S L,LI Z W,CONG N.MultibitΣ-Δmodulator with data weighted averaging technique[J].Microellectronics&Computer,2015,32(1):140-145.
[11]石立春,杨银堂,李迪,等.高精度音频多位SigmaDelta调制器设计[J].中南大学学报(自然科学版),2010,41(2):592-599.SHI L CH,YANG Y T,LI D,et al.Design of highresolution audio multibit sigma-delta modulator[J].Journal of Central South University(Science and Technology),2010,41(2):592-599.
[12]杨文荣,程媛媛.多位数字delta-sigma调制器的设计[J].电子测量技术,2007,30(5):11-13.YANG W R,CHENG Y Y.Design of multi-bit digital delta-sigma modulator[J].Electronic Measurement Technology,2007,30(5):11-13.
[13]PAOLO M,SALVATORE L.Analysis of VCO phasenoise in charge-pump phase-locked loops[J].IEEE Transactions on Circuits and Systems-I:Regular Papers,2012,59(10):2165-2175.
[14]LIU X,JIN J,LI X,et al.Glitch-free multi-modulus frequency divider for quantization noise suppression in fractional-N PLLs[C].Proceedings of InternationalSymposium on Circuits and Systems,2011:478-481.
[15]FUJCIK L,VRBA R.MATLAB Model of 16-bit switchedcapacitor sigma-delta modulator with twostep quantization process[J].IEEE Transactions on Circuits and System,2014,35(7):68-77.
[16]WU F,CHEN Z J,ZHAO M,et al.A new op-amp noise model for switched-capacitor sigma-delta modulator in simulink[C].Proceedings of IEEE International Conference on Electron Devices&Solid-state Circuits,2015:1-2.