用反相器实现积分的低压低功耗级联型ΔΣ调制器
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摘要
针对传统级联型ΔΣ调制器中运算放大器(OTA)增益要求过高和功耗过大的问题,提出了一种用反相器实现积分的级间反馈级联型低压低功耗调制器。该调制器采用带有级间反馈的级联型结构,从系统上消除了传统级联结构中传递函数失配的风险,大大降低了模拟积分器的设计要求,不再需要高电源电压、高增益的OTA实现积分来保证传递函数的精确性。此外,采用低增益、低功耗的C类反相器实现积分功能,节约了芯片功耗和面积,用0.5μm互补型金属氧化物半导体(CMOS)工艺设计了一个两级级联的四阶ΔΣ调制器,仿真结果表明,所设计的调制器版图核心面积仅为858μm×525μm,调制器可工作在低至1.4V的电源电压下,在信号带宽为3.9kHz、过采样率为128的情况下,信噪失真比(SNDR)最大为99.8dB,平均电流消耗仅为58.6μA。该调制器适用于低频信号的高精度处理,具有低压低功耗优势。
A cascadedΔΣmodulator with low voltage and low power using inverter for integration is presented to solve the requirement for high-supply voltage and high-gain operational transconductance amplifiers(OTA)in integrators.The cascaded structure with interstage feedback circumvents the mismatch problem in conventional cascaded structure,and reduces the design demands of analog integrators,without need of high-gain OTA under high supply voltage for the accuracy of the transfer function.A two-stage cascaded fourth-orderΔΣ modulator is designed using 0.5μm complementary-metal-oxide-semiconductor(CMOS)process,and class-C inverters are utilized for integration to reduce power consumption and chip area.Simulation results under a supply voltage as low as 1.4 Vshow that the proposed modulator achieves 99.8 dB peak signal-to-noise-plus-distortion-ratio(SNDR)and 58.6μA current consumption in the case of an oversampling ratio of 128 and a 3.9 kHz signal bandwidth,while the modulator only occupies a chip area of 858μm×525μm.The proposed modulator has advantages of low supply voltage and low power consumption,and is suitable for high-resolution processing of lowfrequency signals.
A cascadedΔΣmodulator with low voltage and low power using inverter for integration is presented to solve the requirement for high-supply voltage and high-gain operational transconductance amplifiers(OTA)in integrators.The cascaded structure with interstage feedback circumvents the mismatch problem in conventional cascaded structure,and reduces the design demands of analog integrators,without need of high-gain OTA under high supply voltage for the accuracy of the transfer function.A two-stage cascaded fourth-orderΔΣ modulator is designed using 0.5μm complementary-metal-oxide-semiconductor(CMOS)process,and class-C inverters are utilized for integration to reduce power consumption and chip area.Simulation results under a supply voltage as low as 1.4 Vshow that the proposed modulator achieves 99.8 dB peak signal-to-noise-plus-distortion-ratio(SNDR)and 58.6μA current consumption in the case of an oversampling ratio of 128 and a 3.9 kHz signal bandwidth,while the modulator only occupies a chip area of 858μm×525μm.The proposed modulator has advantages of low supply voltage and low power consumption,and is suitable for high-resolution processing of lowfrequency signals.
引文
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[9]NAUTA B.A CMOS transconductance-C filter technique for very high frequencies[J].IEEE Journal of Solid State Circuits,1992,27(2):142-153.
[10]MAGHARI N,KWON S,MOON U.74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using35dB open-loop opamp gain[J].IEEE Journal of Solid State Circuits,2009,44(8):2212-2221.
[11]UCHIMURA K,HAYASHI T,KIMURA T,et al.Oversampling A-to-D and D-to-A converters with multistage noise shaping modulators[J].IEEE Transactions on Acoustics,Speech,and Signal Processing,1988,36(12):1899-1905.
[12]MALOBERTI F.Data converters[M].Berlin,Germany:Springer,2007:13-15.
[13]YOUNGCHEOL C,GUNHEE H.Low voltage,low power,inverter-based switched-capacitor delta-sigma modulator[J].IEEE Journal of Solid State Circuits,2009,44(2):458-472.
[14]MICHEL F,STEYAERT M.A 250 mV 7.5μW 61dB SNDR SCΔmodulator using near-threshold-voltage-biased inverter amplifiers in 130nm CMOS[J].IEEE Journal of Solid State Circuits,2012,47(3):709-721.
[15]LUO H,HAN Y,Cheung R C,et al.A 0.8 V230μW 98dB DR inverter-basedΣΔmodulator for audio applications[J].IEEE Journal of Solid State Circuits,2013,48(10):2430-2441.
[16]CHRISTEN T.A 15bit 140μW scalable-bandwidth inverter-basedΔΣmodulator for mems microphone with digital output[J].IEEE Journal of Solid State Circuits,2013,48(7):1605-1614.
[2]李冬梅,高文焕,张鸿远,等.过采样Sigma Deta调制器的研究与仿真[J].清华大学学报(自然科学版),2000,40(7):89-92.LI Dongmei,GAO Wenhuan,ZHANG Hongyuan,et al.Analysis and simulation of oversampling sigma delta modulator[J].Journal of Tsinghua University(Sci&Tech),2000,40(7):89-92.
[3]JOSE M R,ROCIO R.CMOS Sigma-delta converters[M].New York,USA:John Wiley&Sons,Inc.,2013:2-8.
[4]陈浩,孙权,张鸿,等.用于超低频信号测量的高精度低功耗增量式模数转换器[J].西安交通大学学报,2017,51(6):79-85.CHEN Hao,SUN Quan,ZHANG Hong,et al.Incremental analog-to-digital converter with high resolution and low power for measurement of ultra-lowfrequency signals[J].Journal of Xi’an Jiaotong University,2017,51(6):79-85.
[5]REX T B,TERRI S F.Linearity enhancement of multibitΔΣA/D and D/A converters using data weighted averaging[J].IEEE Transactions on Circuits and Systems:II Analog and Digital Signal Processing,1995,42(12):753-762.
[6]RICHARD S.An empirical study of high-order singlebit delta-sigma modulators[J].IEEE Transactions on Circuits and Systems:II Analog and Digital Signal Processing,1993,40(8):461-466.
[7]RIO R,MEDEIRO F,PEREZ-VERDU B,et al.CMOS Cascade sigma-delta modulators for sensors and telecom:error analysis and practical design[M].Berlin Germany:Springer,2006:34-43.
[8]MAGHARI N,KWON S,CABOR C T,et al.Sturdy MASHΔ-Σmodulator[J].Electronic Letters,2006,42(22):1269-1270.
[9]NAUTA B.A CMOS transconductance-C filter technique for very high frequencies[J].IEEE Journal of Solid State Circuits,1992,27(2):142-153.
[10]MAGHARI N,KWON S,MOON U.74dB SNDR multi-loop sturdy-MASH delta-sigma modulator using35dB open-loop opamp gain[J].IEEE Journal of Solid State Circuits,2009,44(8):2212-2221.
[11]UCHIMURA K,HAYASHI T,KIMURA T,et al.Oversampling A-to-D and D-to-A converters with multistage noise shaping modulators[J].IEEE Transactions on Acoustics,Speech,and Signal Processing,1988,36(12):1899-1905.
[12]MALOBERTI F.Data converters[M].Berlin,Germany:Springer,2007:13-15.
[13]YOUNGCHEOL C,GUNHEE H.Low voltage,low power,inverter-based switched-capacitor delta-sigma modulator[J].IEEE Journal of Solid State Circuits,2009,44(2):458-472.
[14]MICHEL F,STEYAERT M.A 250 mV 7.5μW 61dB SNDR SCΔmodulator using near-threshold-voltage-biased inverter amplifiers in 130nm CMOS[J].IEEE Journal of Solid State Circuits,2012,47(3):709-721.
[15]LUO H,HAN Y,Cheung R C,et al.A 0.8 V230μW 98dB DR inverter-basedΣΔmodulator for audio applications[J].IEEE Journal of Solid State Circuits,2013,48(10):2430-2441.
[16]CHRISTEN T.A 15bit 140μW scalable-bandwidth inverter-basedΔΣmodulator for mems microphone with digital output[J].IEEE Journal of Solid State Circuits,2013,48(7):1605-1614.