一种低功耗通用调制解调平台的设计及实现
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摘要
为了降低卫星通信设备中调制解调平台功耗,介绍了一种通用调制解调平台的低功耗设计思路。针对低功耗的设计要求,从器件选择、电源管理和控制策略等方面进行了分析,完成了该通用调制解调平台的硬件设计及实现。测试结果表明,在全速工作模式下,相对于原来设计功耗降低了10 W。在不同工作模式下,实现了功耗动态调整,达到了低功耗设计的目标,证明了设计思路的可行性及有效性。
In order to reduce the power consmption of the modem hardware platform of satellite communication equipment,the paper briefly describes a low-power consumption design concept of the general modem hardware platform,including the choice of devices,the power consumption management and the control strategy. Finally,the design and implementation of the general modem hardware platform are introduced. The test results show that the power consumption is reduced by 10 W under the all-work mode compared with the original design. In addition,the proposed design can adjust the power consumption dynamically under the different work modes,which achieves the goal of the low-power consumption design. Therefore,the feasibility and effectiveness of the proposed design concept are proved.
In order to reduce the power consmption of the modem hardware platform of satellite communication equipment,the paper briefly describes a low-power consumption design concept of the general modem hardware platform,including the choice of devices,the power consumption management and the control strategy. Finally,the design and implementation of the general modem hardware platform are introduced. The test results show that the power consumption is reduced by 10 W under the all-work mode compared with the original design. In addition,the proposed design can adjust the power consumption dynamically under the different work modes,which achieves the goal of the low-power consumption design. Therefore,the feasibility and effectiveness of the proposed design concept are proved.
引文
[1]陈豪.卫星通信与数字信号处理[M].上海:上海交通大学出版社,2011.
[2]徐江海,郏文海.小型化低功耗数字信号处理器设计[J].智能处理与应用,2012(4):71-73.
[3]张杰.一种低功耗手持终端的基带单元硬件平台的设计[J].数字技术与应用,2012(5):166-167.
[4]胡泽明,王志刚,岳春生.嵌入式GIS系统软件的低功耗设计[J].单片机与嵌入式系统应用,2006(3):15-17.
[5]郑洁,串禾.MOSFET开关的驱动[J].电子电力技术,1998,32(1):92-94.
[6]方佩敏.减小功率开关冲击电流措施[J].电子制作,2004(3):50-50.
[7]韩雪,郭文成.FPGA的功耗概念与低功耗设计研究[J].单片机与嵌入式系统应用,2010(3):9-11.
[8]Alter公司.40nm FPGA的功耗管理和优势[J].今日电子,2009(3):50-53.
[9]田素雷,张勇,张磊,等.基于门控时钟技术的IC低功耗设计[J].无线电工程,2010,40(5):57-60.
[2]徐江海,郏文海.小型化低功耗数字信号处理器设计[J].智能处理与应用,2012(4):71-73.
[3]张杰.一种低功耗手持终端的基带单元硬件平台的设计[J].数字技术与应用,2012(5):166-167.
[4]胡泽明,王志刚,岳春生.嵌入式GIS系统软件的低功耗设计[J].单片机与嵌入式系统应用,2006(3):15-17.
[5]郑洁,串禾.MOSFET开关的驱动[J].电子电力技术,1998,32(1):92-94.
[6]方佩敏.减小功率开关冲击电流措施[J].电子制作,2004(3):50-50.
[7]韩雪,郭文成.FPGA的功耗概念与低功耗设计研究[J].单片机与嵌入式系统应用,2010(3):9-11.
[8]Alter公司.40nm FPGA的功耗管理和优势[J].今日电子,2009(3):50-53.
[9]田素雷,张勇,张磊,等.基于门控时钟技术的IC低功耗设计[J].无线电工程,2010,40(5):57-60.