多级交错单相APFC电感电流和FRD电流合成原理
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摘要
为了提高系统效率,改善器件选型难度,并能实现磁性元件在板安装和降低成本,较大功率的单相有源功率因数校正器(APFC)需要采用多级交错有桥结构。为了降低升压电感尺寸,开关频率都在40kHz以上。单相APFC的电感电流合成与FRD电流合成分别决定着网侧电流质量和输出电压质量。本文重点揭示和理论分析电感电流合成中合成电流出现零值和极值的发生条件,并分析FRD电流合成对输出电容纹波电压和ESR损耗的影响,并通过求解电流有效值大小后给出功率开关下串分流电阻的选型依据,以上说法得到理论分析和仿真分析验证,为深入理解和全面掌握多级交错单相APFC工作原理奠定基础。
In order to improve the efficiency of the system,degrade the difficulty of device selection,and realize the installation of magnetic components on the board and reduce the cost, the high power single-phase active power factor corrector(APFC) needs to adopt a multi-phase bridge structure. In order toreduce the size of the boost inductor, the switching frequency is above 40kHz.The inductor current synthesis and FRD current synthesis of single-phase APFC determine the current quality of network side and output voltage quality,respectively. This paper emphatically reveals and theoretically analyzes the conditions under which zero and extreme values of synthetic current occurring in inductance current synthesis, and analyzes the influence of FRD current synthesis on ripple voltage and ESR loss of output capacitor. The selection criteria of series shunt resistor under power switch are given by solving the effective value of current. The above theory is obtained. The analysis and simulation validation lay the foundation for understanding and mastering the working principle of multi-phase interleaving single-phase APFC.
In order to improve the efficiency of the system,degrade the difficulty of device selection,and realize the installation of magnetic components on the board and reduce the cost, the high power single-phase active power factor corrector(APFC) needs to adopt a multi-phase bridge structure. In order toreduce the size of the boost inductor, the switching frequency is above 40kHz.The inductor current synthesis and FRD current synthesis of single-phase APFC determine the current quality of network side and output voltage quality,respectively. This paper emphatically reveals and theoretically analyzes the conditions under which zero and extreme values of synthetic current occurring in inductance current synthesis, and analyzes the influence of FRD current synthesis on ripple voltage and ESR loss of output capacitor. The selection criteria of series shunt resistor under power switch are given by solving the effective value of current. The above theory is obtained. The analysis and simulation validation lay the foundation for understanding and mastering the working principle of multi-phase interleaving single-phase APFC.
引文
[1] Electromagnetic Compatibility[S]. Part 3:Limits—Sect. 2:Limits for Harmonic Current Emission(Equipment Input Current@16 A Per Phase), IEC61000-3-2,1995.
[2] Electromagnetic Compatibility[S]. Part 4:Testing and Measurement Techniques.—Sect. 1:Overview of Immunity Tests. Basic EMC Publication, IEC61000-4-1,1992.
[3] Electromagnetic Compatibility[S]. Part 4:Testing and Measurement Techniques.—Sect. 7:General Guide on Harmonics and Interharmonics Measurements and Instrumentation, for Power Supply Systems and Equipment Connected Thereto, IEC61000-4-7,1991.
[4] Fariborz Musavi, Murray Edington, Member, Wilson Eberle and William G. Dunford. Control Loop Design for a PFC Boost Converter With Ripple Steering[J]. IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 49, NO. 1, JANUARY/FEBRUARY 2013.
[5] ZHANG Wanfeng, FENG Guang, LIU Yan-fei. A Digital PowerFactor Correction(PFC)Control Strategy Optimized for DSP[J]. IEEE Transactions on Power Electronics, 2004,19(6):1474-1485.
[6] Fernando Beltrame, Leandro Roggia, Luciano Schuch, JoséRenesPinheiro. A Comparison of High Power Single-Phase Power Factor Correction Pre-Regulator[J]. 2010 IEEE International Conference on Industrial Technology:625-630.
[7] P.Zumel, A. de Castro, O. Gaecia, T. Riesgo, and J. Uceda,Concurrent and simple digital controller of an ac/dc converter with power factor correction[C]. In Proc. IEEE Applied Power Electronics Conf. Expo,2002:. 469-475.
[8] S. Kim and P.N. Enjeti. Control of multiple single phase PFC modules with a single low-cost DSP[C]. In Proc. 18th Annu. IEEE Applied Power Electronics Conf. Expo, vol. 1, 2003:375-381.
[9] M. O'Loughlin. An interleaving PFC pre-regulator for high-power converters[J]. Texas Instruments, 2006:1-14.
[10] L. Balogh, R. Redl. Power-factor correction with interleaved boost converters in Continuous-inductor-current mode[C]. Applied Power Electronics Conference and.Exposition,1993.APEC'93. Conference Proceedings 1993, Eighth Annual. IEEE, 1993:168-174.
[11] Miwa B A, Otten D M, Schlecht M F. High efficiency power factor correction using interleaving techniques[C]. Applied Power Electronics Conference and Exposition, 1992. APEC'92. Conference Proceedings1992.,Seventh Annual. IEEE, 1992:557-568.
[12] S.Buso et al., Simple digital control improving dynamic performance of power factor pre-regulators[C]. IEEE Trans. Power Electron, vol. 13Sept.1998:814-823.
[2] Electromagnetic Compatibility[S]. Part 4:Testing and Measurement Techniques.—Sect. 1:Overview of Immunity Tests. Basic EMC Publication, IEC61000-4-1,1992.
[3] Electromagnetic Compatibility[S]. Part 4:Testing and Measurement Techniques.—Sect. 7:General Guide on Harmonics and Interharmonics Measurements and Instrumentation, for Power Supply Systems and Equipment Connected Thereto, IEC61000-4-7,1991.
[4] Fariborz Musavi, Murray Edington, Member, Wilson Eberle and William G. Dunford. Control Loop Design for a PFC Boost Converter With Ripple Steering[J]. IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, VOL. 49, NO. 1, JANUARY/FEBRUARY 2013.
[5] ZHANG Wanfeng, FENG Guang, LIU Yan-fei. A Digital PowerFactor Correction(PFC)Control Strategy Optimized for DSP[J]. IEEE Transactions on Power Electronics, 2004,19(6):1474-1485.
[6] Fernando Beltrame, Leandro Roggia, Luciano Schuch, JoséRenesPinheiro. A Comparison of High Power Single-Phase Power Factor Correction Pre-Regulator[J]. 2010 IEEE International Conference on Industrial Technology:625-630.
[7] P.Zumel, A. de Castro, O. Gaecia, T. Riesgo, and J. Uceda,Concurrent and simple digital controller of an ac/dc converter with power factor correction[C]. In Proc. IEEE Applied Power Electronics Conf. Expo,2002:. 469-475.
[8] S. Kim and P.N. Enjeti. Control of multiple single phase PFC modules with a single low-cost DSP[C]. In Proc. 18th Annu. IEEE Applied Power Electronics Conf. Expo, vol. 1, 2003:375-381.
[9] M. O'Loughlin. An interleaving PFC pre-regulator for high-power converters[J]. Texas Instruments, 2006:1-14.
[10] L. Balogh, R. Redl. Power-factor correction with interleaved boost converters in Continuous-inductor-current mode[C]. Applied Power Electronics Conference and.Exposition,1993.APEC'93. Conference Proceedings 1993, Eighth Annual. IEEE, 1993:168-174.
[11] Miwa B A, Otten D M, Schlecht M F. High efficiency power factor correction using interleaving techniques[C]. Applied Power Electronics Conference and Exposition, 1992. APEC'92. Conference Proceedings1992.,Seventh Annual. IEEE, 1992:557-568.
[12] S.Buso et al., Simple digital control improving dynamic performance of power factor pre-regulators[C]. IEEE Trans. Power Electron, vol. 13Sept.1998:814-823.