基于FPGA动态重构的多功能测试技术研究及应用验证
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摘要
针对目前测试装备与被测对象之间呈现出的"多对多"测试格局,结合FPGA动态重构研究一种多功能测试技术。首先从测试前端、典型信号等效器、测试后端三个方面给出了总体研究方案;然后在阐述了FPGA重构原理的前提下,重点研究了作为测试前端关键技术的FPGA远程动态重构实现方式;以航天装备地面测试为背景,设计了集成多种总线接口的典型信号等效器;从测试算法IP库、上位机等方面设计了测试后端;最后基于上述关键技术研制了多功能测试硬件平台,并开展了应用验证,为促进测试装备与被测对象之间向着"一对多"方向发展提供了一定的理论和方法参考。
In view of the situation which‘multiple to multiple'between test equipment and measured object,a multifunction testing technology is studied based on FPGA dynamic reconfiguration. First,the overall research plan is given with test front end,typical signal simulator and test back end. On the premise of explaining FPGA reconfiguration principle,FPGA remote dynamic reconfiguration has been focused on in test front end. In the background of aerospace equipment ground test,typical signal simulator is designed which integrate multiple bus interface. Test back end with test algorithm IP library and HMI has been designed.Finally,based on the above key technologies,a multifunctional test hardware platform is developed,and applied verification is carried out,expected to provide theoretical and methodological reference for multifunction testing technology.
In view of the situation which‘multiple to multiple'between test equipment and measured object,a multifunction testing technology is studied based on FPGA dynamic reconfiguration. First,the overall research plan is given with test front end,typical signal simulator and test back end. On the premise of explaining FPGA reconfiguration principle,FPGA remote dynamic reconfiguration has been focused on in test front end. In the background of aerospace equipment ground test,typical signal simulator is designed which integrate multiple bus interface. Test back end with test algorithm IP library and HMI has been designed.Finally,based on the above key technologies,a multifunctional test hardware platform is developed,and applied verification is carried out,expected to provide theoretical and methodological reference for multifunction testing technology.
引文
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[14]www.xilinx.com.Partial Reconfiguration of a Hardware Accelerator on Zynq-7000 All Programmable So C Devices[Z].
[2]诸厚斌,张丽晔,郭晶,等.航天通用测发控软件平台设计与应用[J].计算机测量与控制,2014,23(5):1799-1801.
[3]齐永龙,宋斌,刘道熙.国外自动测试系统发展综述[J].国外电子测量技术,2015(12):1-4.
[4]刘振洗.基于Lab VIEW的多功能自动测试系统设计[D].西安:西安电子科技大学,2013.
[5]李昆吉.FPGA动态可重构技术及其应用研究[D].哈尔滨:哈尔滨工业大学,2012.
[6]苏玉烽.千兆网络通信系统的FPGA设计实现[M].西安:西安电子科技大学,2012.
[7]乔文生.基于以太网接口的外系统等效器的设计[D].太原:中北大学,2013.
[8]胡景华.基于AXI总线的So C架构设计与分析[D].上海:上海交通大学,2013.
[9]周盛雨.基于FPGA动态部分重构系统实现[D].北京:中科院空间科学与应用研究中心,2007.
[10]VIKRAM lyengar,KRISHNENDU Chakrabarty,ERIK Jan Marinissen.Test Wrapper and Test Access Mechanism CoOptimization for System-on-Chip[J].Journal of ElectronicTesting:Theory and Applications,2002,18(2):213-230.
[11]www.zedboard.org.Zedboard Hardware User’s Guide[Z].
[12]www.xilinx.com.Partial Reconfiguration User Guide[Z].
[13]www.xilinx.com.Virtex-5 FPGA Configuration User Guide[Z].
[14]www.xilinx.com.Partial Reconfiguration of a Hardware Accelerator on Zynq-7000 All Programmable So C Devices[Z].