碳掺杂对28 nm PMOS器件性能的影响
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摘要
基于28nm Polysion工艺,研究了在轻掺杂源漏区(LDD)提升掺杂浓度与掺杂碳源对PMOS器件的影响。实验结果表明,掺杂碳原子可以有效抑制硼的瞬时增强扩散效应(TED),并有效降低器件结深,降低漏电流。在P型轻掺杂源漏区(PLDD)提升掺杂浓度,可以有效提高电路速度,但会导致更严重的硼扩散与漏电流。通过研究不同浓度的碳原子与PLDD浓度对器件的影响,选取合适的碳源掺杂浓度并提高PLDD的掺杂浓度,在同样饱和电流的情况下器件具有更小的漏电流,可以提升PMOS器件的饱和电流与漏电流(Ion-Ioff)性能约6%。
The impact of carbon implantation on PLDD area in 28 nm Polysion PMOS device had been investigated by experiments from semiconductor foundry.Experimental results showed that carbon could be used as co-implantation due to its highly effective mechanism of depressing Transient Enhanced Diffusion(TED),junction depth reduction and leakage current decreasing.Higher dosage on PLDD could improve the circuit speed,but would result in serious boron diffusion and leakage current.The impacts on device performances by different dosage of carbon and PLDD implantation were studied.It got a higher saturated current in a lower leakage current,which improved the PMOS device performance of saturated current and leakage current(Ion-Ioff)by 6% by choosing the appropriate dosage.
The impact of carbon implantation on PLDD area in 28 nm Polysion PMOS device had been investigated by experiments from semiconductor foundry.Experimental results showed that carbon could be used as co-implantation due to its highly effective mechanism of depressing Transient Enhanced Diffusion(TED),junction depth reduction and leakage current decreasing.Higher dosage on PLDD could improve the circuit speed,but would result in serious boron diffusion and leakage current.The impacts on device performances by different dosage of carbon and PLDD implantation were studied.It got a higher saturated current in a lower leakage current,which improved the PMOS device performance of saturated current and leakage current(Ion-Ioff)by 6% by choosing the appropriate dosage.
引文
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[2]张汝京.纳米集成电路制造工艺[M].北京:清华大学出版社,2014:220-298.
[3] CHIRANU G C,BABARADA F.LDD structure influence on n-MOSFET parameters[C]∥Int Semicond Conf.Sinaia,Romania.2015:263-266.
[4] NEAMEN D A.半导体物理与器件[M].北京:电子工业出版社,2017.
[5] ANARWAL A,GOSSMANN H J,JACOBSON D C,et al.Transient enhanced diffusion from implantation of molecular decaborane ions[C]∥Int Conf Ion Implant Technol.Kyoto,Japan.1998,2:857-860.
[6] CHAKRAVARTHI S,DUNHAM S T.Modeling of boron deactivatiod activation kinetics during ion implant annealing[C]∥Int Conf Simul Semicond Process&Dev.Seattle,WA,USA.2000:167-170.
[7] PRIVITERA V,PRIOLO F,NAPOLITANI E,et al.A novel method to suppress transient enhanced diffusion of low energy implanted boron based on reactive plasma etching[C]∥Int Conf Ion Implant Technol.Kyoto,Japan.1998,2:845-848.
[8] BAN I,OZTURK M C,DEMIRLIOGLU E K.Suppression of oxidation-enhanced boron diffusion in silicon by carbon implantation and characterization of MOSFET’s with carbon-implanted channels[J].IEEE Trans Elec Dev,1997,44(9):1544-1551.
[9] MUBAREK H A W E,KARUNARATNE M,BONAR J M,et al.Effect of fluorine implantation dose on boron transient enhanced diffusion and boron thermal diffusion in Si1-xGex[J].IEEE Trans Elec Dev,2005,52(4):518-526.
[10]NAGAYAMA T,ONODA H,TANJYO M,et al.Suppression of phosphorus diffusion using cluster carbon co-implantation[C]∥Int Workshop Junc Technol Extend Abstra.Shanghai,China.2010:1-4.
[11]ZHANG P,LIU W,JIN X B,et al.The optimization method of device mismatch on 40 nm[C]∥Chin Semicond Technol Int Conf.Shanghai,China.2015:1-3.
[12]ZSCHATZSCH G,VANDERVORST W,HOFFMANN T,et al.Fundamental study on the impact of C coimplantation on ultra shallow B juntions[C]∥Int Workshop Junc Technol.Kyoto,Japan.2009:123-126.
[13]MOHAPATRA N R,GANERIWALA M D,SATYA S M.Effect of pregate carbon implant on narrow width behavior and performance of high-k metal-gate nMOS transistors[J].IEEE Trans Elec Dev,2016,63(7):2708-2713.
[14]KUO P,LI C I,LIU P W,et al.Molecular carbon implant technology for ultra-shallow junction formation and nMOSFET strain application in a 40nm node logic device[C]∥Int Workshop Junc Technol.Kyoto,Japan.2009:25-26.