一种基于LVDS长线传输的高可靠性优化设计
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摘要
为了解决高速数据在长线传输过程中可靠性较低,易于出现误码的问题.对基于LVDS的长线传输系统进行了有针对性的优化设计,在数据接口的硬件电路上增加补偿电路,用来解决在长电缆上的信号衰减与损耗.同时在逻辑上设计了基于CRC校验的数据包反馈重传机制,并对数据的传输设计了一种10B/6B的编码方式,能够对数据进行纠错,进一步降低数据传输过程中的误码率.经过实验验证,该优化设计实现了在89m的长电缆上,以330Mbps的速率进行数据的零误码率传输.
In order to solve the problem of low reliability and prone to errors in high-speed data transmission in the long-line transmission process,a targeted optimization design for the long-haul transmission system based on LVDS is carried out.A compensation circuit is added to the hardware circuit of the data interface to solve the signal attenuation and loss on the long cable.At the same time,the packet feedback retransmission mechanism based on CRC check is designed logically,and a 10 B/6 Bcoding mode is designed for data transmission,which can correct the data and further reduce the error rate in the data transmission process.By experimental verification,the optimized design realizes zero error rate transmission of data at a rate of 330 Mbps over a long cable of 89 m.
In order to solve the problem of low reliability and prone to errors in high-speed data transmission in the long-line transmission process,a targeted optimization design for the long-haul transmission system based on LVDS is carried out.A compensation circuit is added to the hardware circuit of the data interface to solve the signal attenuation and loss on the long cable.At the same time,the packet feedback retransmission mechanism based on CRC check is designed logically,and a 10 B/6 Bcoding mode is designed for data transmission,which can correct the data and further reduce the error rate in the data transmission process.By experimental verification,the optimized design realizes zero error rate transmission of data at a rate of 330 Mbps over a long cable of 89 m.
引文
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[2]张摇鹏,杜彬彬,任勇峰.基于FPGA的超声数据采集装置的设计与实现[J].电子器件,2014,20(5):81-84.Zhang Yaopeng,Du Binbin,Ren Yongfeng.Design and implement of ultrasound data acquisition device based on FPGA[J].Chinese Journal of Electron Devices,2014,20(5):81-84.(in Chinese)
[3]伍伟,刘亚斌,张秀磊.基于PXI高速多通道AD采集卡的设计[J].电子设计工程,2017,25(12):178-181.Wu Wei,Liu Yabin,Zhang Xiulei.Design of the high-speed and multi-channel parallel AD acquisition card based on PXI[J].Electronic Design Engineering,2017,25(12):178-181.(in Chinese)
[4]姚永兴.多通道数据存储器系统关键技术研究[D].太原:中北大学,2012.
[5]张文栋.存储测试系统的设计理论及其应用[M].北京:高等教育出版社,2002.
[6]崔婧.多通道模数数据混合采集装置的设计及实现[D].太原:中北大学,2014.
[7]李辉景,王淑琴,任勇峰,等.基于CRC校验的高速长线LVDS传输设计[J].电子器件,2015,38(6):1346-1531.Li Huijing,Wang Shuqin,Ren Yongfeng,et al.Design of high-speed and long-term LVDS data transmission system based on CRC check[J].Chinese Journal of Electron Devices,2015,38(6):1346-1531.(in Chinese)
[8]李北国,杨圣龙,李辉景.基于FPGA的LVDS高可靠性传输优化设计[J].电子技术应用,2018,44(8):78-81.Li Beiguo,Yang Shenglong,Li Huijing.High reliability transmission optimization design of LVDS based on FPGA[J].Application of Electronic Technique,2018,44(8):78-81.(in Chinese)
[9]来卫国.10位BLVDS串化器DS92LV1023和解串器DS92LV1224的原理及应用[J].国外电子元器件,2002(8):45-47.Lai Weiguo.The principle and application of 10Bit BLVDS serializer DS92LV1023 and deserializer DS92LV1224[J].International Electronic Elements,2002(8):45-47.(in Chinese)
[10]赵阳刚,郭涛,黄玉岗.基于FPGA和LVDS的弹载数据回读系统设计[J].电子器件,2017,40(1):113-117.Zhao Yanggang,Guo Tao,Huang Yugang.Designing of readout system for missile-loaded data based on FPGA and LVDS[J].Chinese Journal of Electron Devices,2017,40(1):113-117.(in Chinese)
[11]郭虎峰,陈香香,李楠.基于LVDS总线和8b/10b编码技术的高速远距离传输设计[J].自动化与仪表,2015,30(5):32-36.Guo Hufeng,Chen Xiangxiang,Li Nan.High speed long distance transmission based on LVDS and 8b/10b encoding technology[J].Automation&Instrumentation,2015,30(5):32-36.(in Chinese)
[12]刘佳宁,文丰,王淑琴,等.基于LVDS的高可靠性长线传输设计[J].电子器件,2017,40(5):1209-1213.Liu Jianing,Wen Feng,Wang shuqin,et al.Design of long-distance transmission with high reliability based on LVDS[J].Chinese Journal of Electron Devices,2017,40(5):1209-1213.(in Chinese)