一种新型低功耗电流模式CMOS带隙基准设计
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摘要
为了降低传统带隙基准源的功耗和面积,提出了一种新型基于电流模式高阶曲率修正的带隙基准电压源电路。通过改进的电流模式曲率校正方法实现高阶温度补偿,并且通过集电极电流差生成绝对温度成正比PTAT(Proportional To Absolute Temperature)电流,因此所需电阻以及双极型晶体管BJT(Bipolar Junction Transistor)数量更少。采用标准0.35μm CMOS技术对提出电路进行了具体实现。测量结果显示,温度在-40℃～130℃之间时,电路温度系数为6.85×10~(-6)/℃,且能产生508.5 mV的基准电压。相比其他类似电路,当供电电源为3.3 V时,提出电路的整体静态电流消耗仅为9.8μA,面积仅为0.09 mm~2。
In order to reduce the power consumption and area of the traditional bandgap reference,a new band gap reference voltage source circuit based on current mode high order curvature correction is proposed.Through the improvement of current mode curvature correction method high-order temperature compensation is realized,and the collector current difference generation absolute temperature is proportional to the PTAT current,therefore resistance and bipolar transistor(BJT)fewer.The implementation of the proposed circuit is realized by using standard 0.35μm CMOS technology.The measurement results show that the temperature coefficient of the circuit is 6.85×10~(-6)/℃,and the reference voltage is 508.5 mV in -40℃~130℃.Compared to other similar circuits,when the power supply is 3.3 V,the overall static current consumption of the circuit is only 9.8μA,the area is only 0.09 mm~2.
In order to reduce the power consumption and area of the traditional bandgap reference,a new band gap reference voltage source circuit based on current mode high order curvature correction is proposed.Through the improvement of current mode curvature correction method high-order temperature compensation is realized,and the collector current difference generation absolute temperature is proportional to the PTAT current,therefore resistance and bipolar transistor(BJT)fewer.The implementation of the proposed circuit is realized by using standard 0.35μm CMOS technology.The measurement results show that the temperature coefficient of the circuit is 6.85×10~(-6)/℃,and the reference voltage is 508.5 mV in -40℃~130℃.Compared to other similar circuits,when the power supply is 3.3 V,the overall static current consumption of the circuit is only 9.8μA,the area is only 0.09 mm~2.
引文
[1]王红义,来新泉,李玉山,等.采用二次曲线校正的CMOS带隙基准[J].电子器件,2007,30(4):1155-1158.
[2]Andreou C M,Koudounas S,Georgiou J.A Novel Wide-Temperature-Range,3.9×10-6/C CMOS Bandgap Reference Circuit[J].Solid-State Circuits,IEEE Journal of,2012,47(2):574-581.
[3]Lee I,Kim G,Kim W.Exponential Curvature-Compensated Bi CMOS Bandgap References[J].IEEE Journal of Solid-State Circuits,1994,29(11):1396-1403.
[4]Marquez F,Mu1oz F,Carvajal R G,et al.A Novel Autozeroing Technique for Flash Analog-to-Digital Converters[J].Integration the Vlsi Journal,2014,47(1):23-29.
[5]Rincon-Mora G,Allen P E.A 1.1-V Current-Mode and PiecewiseLinear Curvature-Corrected Bandgap Reference[J].IEEE Journal of Solid-State Circuits,1998,33(10):1551-1554.
[6]Bowers D F,Modica E J.Curvature-Corrected Low-Noise SubBandgap Reference in 28 nm CMOS Technology[J].Electronics Letters,2014,50(5):396-398.
[7]胡勇,彭晓宏,刘云康,等.一种新型电流模式带隙基准源的设计[J].微电子学,2013,43(4):457-459.
[8]唐宇,冯全源.一种低温漂低功耗带隙基准的设计[J].电子元件与材料,2014,33(2):35-38.
[9]Banba H,Shiga H,Umezawa A,et al.A CMOS Bandgap Reference Circuit with Sub-1-V Operation[J].IEEE Journal of Solid-State Circuits,1999,34(5):670-674.
[10]Malcovati P,Maloberti F,Fiocchi C,et al.Curvature-Compensated Bi CMOS Bandgap with 1-V Supply Voltage[J].IEEE Journal of Solid-State Circuits,2001,36(7):1076-1081.
[11]Li J H,Zhang X B,Yu M Y.A 1.2-V Piecewise Curvature-Corrected Bandgap Reference in 0.5 m CMOS Process[J].IEEE Transactions on Very Large Scale Integration Systems,2011,19(6):1118-1122.
[2]Andreou C M,Koudounas S,Georgiou J.A Novel Wide-Temperature-Range,3.9×10-6/C CMOS Bandgap Reference Circuit[J].Solid-State Circuits,IEEE Journal of,2012,47(2):574-581.
[3]Lee I,Kim G,Kim W.Exponential Curvature-Compensated Bi CMOS Bandgap References[J].IEEE Journal of Solid-State Circuits,1994,29(11):1396-1403.
[4]Marquez F,Mu1oz F,Carvajal R G,et al.A Novel Autozeroing Technique for Flash Analog-to-Digital Converters[J].Integration the Vlsi Journal,2014,47(1):23-29.
[5]Rincon-Mora G,Allen P E.A 1.1-V Current-Mode and PiecewiseLinear Curvature-Corrected Bandgap Reference[J].IEEE Journal of Solid-State Circuits,1998,33(10):1551-1554.
[6]Bowers D F,Modica E J.Curvature-Corrected Low-Noise SubBandgap Reference in 28 nm CMOS Technology[J].Electronics Letters,2014,50(5):396-398.
[7]胡勇,彭晓宏,刘云康,等.一种新型电流模式带隙基准源的设计[J].微电子学,2013,43(4):457-459.
[8]唐宇,冯全源.一种低温漂低功耗带隙基准的设计[J].电子元件与材料,2014,33(2):35-38.
[9]Banba H,Shiga H,Umezawa A,et al.A CMOS Bandgap Reference Circuit with Sub-1-V Operation[J].IEEE Journal of Solid-State Circuits,1999,34(5):670-674.
[10]Malcovati P,Maloberti F,Fiocchi C,et al.Curvature-Compensated Bi CMOS Bandgap with 1-V Supply Voltage[J].IEEE Journal of Solid-State Circuits,2001,36(7):1076-1081.
[11]Li J H,Zhang X B,Yu M Y.A 1.2-V Piecewise Curvature-Corrected Bandgap Reference in 0.5 m CMOS Process[J].IEEE Transactions on Very Large Scale Integration Systems,2011,19(6):1118-1122.