1.5×10~(-6)/℃高阶参考电压曲率补偿电路
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摘要
针对带隙参考电压基准温漂问题设计了一款高阶补偿电路,并采用0.5μm BCD工艺进行了验证。电路采用零温度系数(TC)电流实现一阶补偿,同时采用具有正温度系数(PTC)的双极型晶体管(BJT)实现了高阶补偿。采用HSPICE软件进行了仿真,结果表明,所设计的电路参考电压正常值为1.8 V。另外,设计的电路具有1.5×10-6/℃的温度系数,在低频上具有55 d B电源抑制比(PSRR),从1.8~5 V具有0.4 m V/V的线性调整率,并得到20 f V2/Hz的输出噪声水平。提出的电路已应用在一款电源管理芯片中,且该电路可应用在多种便携式电子产品中。
A high-order curvature compensating circuit was presented to overcome the temperature drift of the bandgap voltage reference( BVR) circuit that was implemented in a 0. 5 μm BCD process to be validated. A zero temperature coefficient( TC) current was used to realize the first-order compensation as well as a positive temperature coefficient( PTC) current with bipolar junction transistors( BJTs)to achieve high-order compensation. The simulation results with HSPICE software show that the proposed voltage reference works normally at 1. 8 V. In addition, the designed circuits with a TC of 1. 5 ×10- 6/ ℃,a power supply rejection ratio( PSRR) of 55 d B at low frequencies, a line regulation of0. 4 m V / V from 1. 8 V to 5 V and an output noise level of 20 f V2/ Hz are achieved. The presented circuits were applied in a power management integrated circuit( IC) and can be widely applied in portable equipments.
A high-order curvature compensating circuit was presented to overcome the temperature drift of the bandgap voltage reference( BVR) circuit that was implemented in a 0. 5 μm BCD process to be validated. A zero temperature coefficient( TC) current was used to realize the first-order compensation as well as a positive temperature coefficient( PTC) current with bipolar junction transistors( BJTs)to achieve high-order compensation. The simulation results with HSPICE software show that the proposed voltage reference works normally at 1. 8 V. In addition, the designed circuits with a TC of 1. 5 ×10- 6/ ℃,a power supply rejection ratio( PSRR) of 55 d B at low frequencies, a line regulation of0. 4 m V / V from 1. 8 V to 5 V and an output noise level of 20 f V2/ Hz are achieved. The presented circuits were applied in a power management integrated circuit( IC) and can be widely applied in portable equipments.
引文
[1]RINCON-MORA G A.Voltage references from diodes to precision high-order bandgap circuits[M].New York:Wiley-IEEE Press,2001:25-67.
[2]ZHANG C,HE S Z,ZHU Y,et al.A high precision CMOS bandgap reference with second-order curvature compensation[C]∥Proceedings of IEEE International Confrence on ASIC.Guilin,China,2007:553-556.
[3]BECKER G A,LAKSHMI V T,VISWANATHAN T R.A low-supply-voltage CMOS sub-bandgap reference[J].IEEE Trans on Circuits and Systems II,2008,55(7):609-613.
[4]SANBORN K,MA D,IVANOV V.A sub-1-V lownoise bandgap voltage reference[J].IEEE Journal of Solid-State Circuits,2007,42(11):2466-2481.
[5]GIUSEPPE D V,GIUSEPPE I.Ultra-low-power temperature compensated voltage reference generator[J].Microelectronics Journal,2006,37(10):1072-1079.
[6]LEE I,KIM G,KIM W.Exponential curvature-compensated Bi CMOS bandgap references[J].IEEE Journal of Soild-State Circuit,1994,29(11):1396-1403.
[7]MALCOVATI P,MALOBERTI F,FIOCCHI C,et al.Curvature compensated Bi CMOS bandgap with 1-V supply voltage[J].IEEE Journal of Solid-State Circuits,2001,36(7):1076-1081.
[8]LEUNG K N,MOK P K T,LEUNG C Y.A 2 V 23μA5.3-ppm/℃curvature-compensated CMOS bandgap reference[J].IEEE Journal of Solid-State Circuits,2003,38(3):561-564.
[9]SHI L F,MA X,QIN G H,et al.A wide supply range bandgap voltage reference with curvature compensation[J].Journal of Circuits Systems,and Computers,2013,22(1):1250068-1-1250068-14.
[10]GUAN X K,WANG X,WANG A,et al.A 3 V110μW 3.1 ppm/℃curvature-compensated CMOS bandgap reference[J].Analog Integrated Circuits and Signal Process,2010,62(2):113-119.
[11]RAZAVI B.Design of analog CMOS integrated circuits[M].New York:New York Press,2001:312-326.
[12]KER M D,CHEN J S,CHU C Y.New curvaturecompensation technique for CMOS bandgap reference with sub-1 V operation[J].IEEE Trans on Circuits and Systems II,2006,53(8):667-671.
[13]KA N L,MOK P K T.A CMOS voltage reference based on weightedΔVGS for CMOS low-dropout linear regulators[J].IEEE Journal of Solid-State Circuits,2003,38(1):146-150.
[14]TAM W S,WONG O Y,KOK C W,et al.Generating sub-1 V reference voltages from a resistorless CMOS bandgap reference circuit by using a piecewise curvature temperature compensation technique[J].Microelectronics Reliability,2010,50(8):1054-1061.
[2]ZHANG C,HE S Z,ZHU Y,et al.A high precision CMOS bandgap reference with second-order curvature compensation[C]∥Proceedings of IEEE International Confrence on ASIC.Guilin,China,2007:553-556.
[3]BECKER G A,LAKSHMI V T,VISWANATHAN T R.A low-supply-voltage CMOS sub-bandgap reference[J].IEEE Trans on Circuits and Systems II,2008,55(7):609-613.
[4]SANBORN K,MA D,IVANOV V.A sub-1-V lownoise bandgap voltage reference[J].IEEE Journal of Solid-State Circuits,2007,42(11):2466-2481.
[5]GIUSEPPE D V,GIUSEPPE I.Ultra-low-power temperature compensated voltage reference generator[J].Microelectronics Journal,2006,37(10):1072-1079.
[6]LEE I,KIM G,KIM W.Exponential curvature-compensated Bi CMOS bandgap references[J].IEEE Journal of Soild-State Circuit,1994,29(11):1396-1403.
[7]MALCOVATI P,MALOBERTI F,FIOCCHI C,et al.Curvature compensated Bi CMOS bandgap with 1-V supply voltage[J].IEEE Journal of Solid-State Circuits,2001,36(7):1076-1081.
[8]LEUNG K N,MOK P K T,LEUNG C Y.A 2 V 23μA5.3-ppm/℃curvature-compensated CMOS bandgap reference[J].IEEE Journal of Solid-State Circuits,2003,38(3):561-564.
[9]SHI L F,MA X,QIN G H,et al.A wide supply range bandgap voltage reference with curvature compensation[J].Journal of Circuits Systems,and Computers,2013,22(1):1250068-1-1250068-14.
[10]GUAN X K,WANG X,WANG A,et al.A 3 V110μW 3.1 ppm/℃curvature-compensated CMOS bandgap reference[J].Analog Integrated Circuits and Signal Process,2010,62(2):113-119.
[11]RAZAVI B.Design of analog CMOS integrated circuits[M].New York:New York Press,2001:312-326.
[12]KER M D,CHEN J S,CHU C Y.New curvaturecompensation technique for CMOS bandgap reference with sub-1 V operation[J].IEEE Trans on Circuits and Systems II,2006,53(8):667-671.
[13]KA N L,MOK P K T.A CMOS voltage reference based on weightedΔVGS for CMOS low-dropout linear regulators[J].IEEE Journal of Solid-State Circuits,2003,38(1):146-150.
[14]TAM W S,WONG O Y,KOK C W,et al.Generating sub-1 V reference voltages from a resistorless CMOS bandgap reference circuit by using a piecewise curvature temperature compensation technique[J].Microelectronics Reliability,2010,50(8):1054-1061.