封装中电源地阻抗测试方法研究
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摘要
本文通过追溯了微电子器件封装的电源和地阻抗测试方法的发展历史,基于对业界封装阻抗测试方法的分析,比较了同类方法间各自的优势,分析了美军标MI L-STD-883K中封装阻抗测试方法很少修订却长期存在的原因。明确了美军标及其他测试方法的适用范围,总结了封装电源和地阻抗的影响因素,提出了我国相应标准制修订方向的建议。同时,经相关测试结果表明,标准中的现有方法在评估封装阻抗对整体电路影响方面过于简单,需要结合电磁仿真和时域反射方法对封装阻抗影响做出整体评估,从而提高测试的准确度,经过改进的方法可以在我国相应标准的制修订中加以采用。
This paper presents the history ofpower supply and ground impedance measurements for microelectronics device package. Based on the analysis of test methods used in the industry, the respective advantages are compared.Analyzing the reason why impedance test in the standard method is rarely revised, the applicability of the impedance measurement methods in MIL-STD-883 K and the industry, and revision directionsforour corresponding standard in China are proposed. The test results show that the electromagnetic simulation tools and TDR need to be used to estimate the influence integrally and introducedto the standards in China.
This paper presents the history ofpower supply and ground impedance measurements for microelectronics device package. Based on the analysis of test methods used in the industry, the respective advantages are compared.Analyzing the reason why impedance test in the standard method is rarely revised, the applicability of the impedance measurement methods in MIL-STD-883 K and the industry, and revision directionsforour corresponding standard in China are proposed. The test results show that the electromagnetic simulation tools and TDR need to be used to estimate the influence integrally and introducedto the standards in China.
引文
[1]菅端端,刘芳,钟明琛.美军标MIL-STD-883K中噪声容限测试方法的适用性研究[J].电子测量技术,2017, 40(5):14-22.
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[4]陶峰,黄成,吴建辉.射频阻抗测量夹具建模技术的研究及应用[J].电子器件,2007(03):1075-1078.
[5]菅端端,张驰.下一代光传输系统DAC芯片动态性能测试方法[J].电子测量技术, 2018, 41(5):42-46.
[6] Wang C D,Chang Y J,Lu Y C,etal.ABF-Based TSV Arrays With Improved Signal Integrity on 3-D IC/Interposers:Equivalent Models and Experiments[J]. IEEE Transactions on Components,Packaging and Manufacturing Technology. 2013:2-6.
[7]孟真,刘谋,张兴成,et al. TSV封装中阻抗不连续差分互连结构宽频寄生参数建模研究[J].微电子学与计算机,2017,34(08):6-11.
[8]王德敬,赵元富,姚全斌,et al.2.5GS/s高速DAC陶瓷封装协同设计[J].电子技术应用,2017,43(01):16-19.
[9]杨亚非.微电子封装的关键技术及应用前景研究[J].信息与电脑(理论版),2016(01):41+43.
[10]KoiwaK,Itoh J I. A maximum power density design method for nine-switch matrix converter using Si CMOSFET[J].IEEE Transactions on Power Electronics,2015.
[11]雷勇颋.微电子封装技术的优势与应用[J].技术与市场,2016,23(11):99.
[12] Model 2410 Source Meter Service Manual. Tektronic. http://www.tek.com.cn. 2015
[13]Jitesh Shah.低阻抗封装走线规划[J].中国集成电路,2013,22(12):48-50.
[14] ZhangJ,LimJ,Yao W, etc. PCB via to trace returnloss optimization for>25gbps serial links[J]. 2014 EMC,2014,619-624.
[15]菅端端,赵鑫.数字电路封装的串扰测试方法研究[J].国外电子测量技术, 2017, 36(6):14-21.
[2]邓长开,唐明津,胡义平.安捷伦高频阻抗测试仪表E4982A测控技术应用[J].电子与封装, 2018, 18(06):8-11.
[3]菅端端,陈大为,袁修华.超高频无源标签芯片测试方法研究[J].电子测量技术, 2017, 40(12):68-74.
[4]陶峰,黄成,吴建辉.射频阻抗测量夹具建模技术的研究及应用[J].电子器件,2007(03):1075-1078.
[5]菅端端,张驰.下一代光传输系统DAC芯片动态性能测试方法[J].电子测量技术, 2018, 41(5):42-46.
[6] Wang C D,Chang Y J,Lu Y C,etal.ABF-Based TSV Arrays With Improved Signal Integrity on 3-D IC/Interposers:Equivalent Models and Experiments[J]. IEEE Transactions on Components,Packaging and Manufacturing Technology. 2013:2-6.
[7]孟真,刘谋,张兴成,et al. TSV封装中阻抗不连续差分互连结构宽频寄生参数建模研究[J].微电子学与计算机,2017,34(08):6-11.
[8]王德敬,赵元富,姚全斌,et al.2.5GS/s高速DAC陶瓷封装协同设计[J].电子技术应用,2017,43(01):16-19.
[9]杨亚非.微电子封装的关键技术及应用前景研究[J].信息与电脑(理论版),2016(01):41+43.
[10]KoiwaK,Itoh J I. A maximum power density design method for nine-switch matrix converter using Si CMOSFET[J].IEEE Transactions on Power Electronics,2015.
[11]雷勇颋.微电子封装技术的优势与应用[J].技术与市场,2016,23(11):99.
[12] Model 2410 Source Meter Service Manual. Tektronic. http://www.tek.com.cn. 2015
[13]Jitesh Shah.低阻抗封装走线规划[J].中国集成电路,2013,22(12):48-50.
[14] ZhangJ,LimJ,Yao W, etc. PCB via to trace returnloss optimization for>25gbps serial links[J]. 2014 EMC,2014,619-624.
[15]菅端端,赵鑫.数字电路封装的串扰测试方法研究[J].国外电子测量技术, 2017, 36(6):14-21.