封装基板阻焊层分层分析与研究
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摘要
封装基板的可靠性对封装产品至关重要。通过对超薄层压基板封装产品的失效实例进行分析研究,确认由于基板阻焊层受应力造成阻焊层与铜层出现分层。经基板分层应力仿真模拟,发现阻焊层的厚度对阻焊层受到的应力影响最明显。增加阻焊层的厚度,可减小阻焊层与铜层之间的应力,解决阻焊层与铜层之间的分层问题,也提高了基板封装产品的可靠性。
The reliability of substrate is very important for package. The paper is the study of ultra-thin laminated substrate reliability test failure, finds the solder mask delaminates with copper layer cause as high stress of solder mask. The stress simulation shows the solder mask thickness is the most affected factor for solder mask stress. Increase solder mask thickness can reduce the stress between solder mask and copper layer,solve the delamination issue, improve the reliability of substrate package.
The reliability of substrate is very important for package. The paper is the study of ultra-thin laminated substrate reliability test failure, finds the solder mask delaminates with copper layer cause as high stress of solder mask. The stress simulation shows the solder mask thickness is the most affected factor for solder mask stress. Increase solder mask thickness can reduce the stress between solder mask and copper layer,solve the delamination issue, improve the reliability of substrate package.
引文
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[2]田明波,林金堵,祝大同.高密度封装基板[M].北京:清华大学出版社,2011:3-12.
[3]Z Y Oh,R Newman,M C Ong,F J Foo.Study of underfill-to-soldermask delamination in flip-chip packages[J].IEEE,Physical and Failure Analysis of Integrated Circuits,2012,20(5):225-227.
[4]Hazawa Nerima-ku.Liquid Photo Imageable Solder Mask Non-Halogen Type,PSR-4000 AUS308/CA-40 AUS308[R].TokyoJapan:TaiYo176-8508,March 2004:2-7.
[5]ASE Group.CSP-BGA(Sawing Type)Substrate Design Rule[R].China:Center Design Engineering,ASE Group,2009.
[6]Hai Ding,R E Powell,I C Ume.Warpage measurement comparison using shadow Moire and projection Moire methods[J].IEEE Transactions on Components&Packaging,2002,25(4):714-721.
[7]Raghavan S,K Lein K,Yoon S,et al.Methodology to predict substrate warpage and different techniques to achieve substrate warpage target[J].IEEE Transations on components,packageing and manufacturing technology,2011,1(7):1064-1074.
[8]Cho S,Cho S,Lee YJ.Estimation of warpage and thermal stress of IVHs in flip-chip ball grid arrays package by FEM[J].Microelectronics Reliability,2008,48(2):300-309.
[9]Vito Lin,Eason Chen,Don Son Jiang,Yu Po Wang.Warpage and Stress Characteristic Analyses on WireBond-S-FCCSP Structure[J].2009 IMPACT,2009,5(2):103-105.
[10]IC Ume,T Martin.Finite element analysis of PWBwarpage due to cured solder mask-sensitivity analysis[J].IEEE Transations on components,packageing and manufacturing technology,Part A,1997,20(3):307-316.