基于40nm CMOS工艺电路的NBTI退化表征方法
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摘要
负偏压温度不稳定性(NBTI)退化是制约纳米级集成电路性能及寿命的主导因素之一,基于40 nm CMOS工艺对NBTI模型、模型提参及可靠性仿真展开研究。首先对不同应力条件下PMOS晶体管NBTI退化特性进行测试、建模及模型参数提取,然后建立了基于NBTI效应的VerilogA等效受控电压源,并嵌入Spectre~(TM)仿真库中,并将此受控电压源引入反相器及环形振荡器模块电路中进行可靠性仿真分析,可有效反映NBTI退化对电路性能的影响。提出了一套完整可行的电路NBTI可靠性预测方法,包括NBTI模型、模型参数提取、VerilogA可靠性模型描述以及电路级可靠性仿真分析,可为纳米级高性能、高可靠性集成电路设计提供有效参考。
The negative bias temperature instability(NBTI) degradation is one of most important factors restricting the performance and lifetime of nanometer integrated circuits. The NBTI model,the extraction of model parameters and the reliability simulation were studied based on 40 nm CMOS process. Firstly, the NBTI degradation characteristics of PMOS transistors under different stress conditions were tested and modeled, then the parameters for modeling were extracted. Then, the VerilogA voltage-controlled voltage source(VCVS) based on NBTI effect was established and embedded into Spectre~(TM) library. The VCVS was introduced into the circuit, including the inverters and the ring-oscillators,for reliability simulation, which could effectively reflect the influence of the NBTI on the circuit performance degradation. A comprehensive reliability prediction method for NBTI-introduced circuit was proposed, which involved NBTI modeling, extraction of parameters for model, VerilogA reliability model and circuit level reliability simulation. It can provide an valuable guide for the design of high performance and high reliability nanometer integrated circuits.
The negative bias temperature instability(NBTI) degradation is one of most important factors restricting the performance and lifetime of nanometer integrated circuits. The NBTI model,the extraction of model parameters and the reliability simulation were studied based on 40 nm CMOS process. Firstly, the NBTI degradation characteristics of PMOS transistors under different stress conditions were tested and modeled, then the parameters for modeling were extracted. Then, the VerilogA voltage-controlled voltage source(VCVS) based on NBTI effect was established and embedded into Spectre~(TM) library. The VCVS was introduced into the circuit, including the inverters and the ring-oscillators,for reliability simulation, which could effectively reflect the influence of the NBTI on the circuit performance degradation. A comprehensive reliability prediction method for NBTI-introduced circuit was proposed, which involved NBTI modeling, extraction of parameters for model, VerilogA reliability model and circuit level reliability simulation. It can provide an valuable guide for the design of high performance and high reliability nanometer integrated circuits.
引文
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[8] JOSHI K,MUKHOPADHYAY S,GOEL N,et al.A consistent physical framework for n and p BTI in HKMG MOSFETs[C]// Proceedings of IEEE International Reliability Physics Symposium.Anaheim,CA,USA,2012:5A.3.1-5A.3.10.
[9] BHARDWAJ S, WANG W P, VATTIKONDA R, et al. Predictive modeling of the NBTI effect of reliable design [C] // Proceedings of IEEE Custom Integrated Circuits Conference. San Jose, CA, USA, 2006: 189-192.
[10] WANG Y L, LI X J, QING J, et al. Analytical parameter extraction for NBTI reaction diffusion and trapping/detrapping models [J]. Microelectronics Reliability, 2016, 66:10-15.
[2] 宋芳芳,解江,李斌,等. PMOSFET动态NBTI效应的研究[J].半导体技术,2010, 35(1):79-83.SONG F F, XIE J, LI B, et al. Study on dynamic NBTI effect in PMOSFET [J]. Semiconductor Technology, 2010,35(1):79-83(in Chinese).
[3] PARIHAR N, GOEL N, CHAUDHARY A, et al. A modeling framework for NBTI degradation under dynamic voltage and frequency scaling [J]. IEEE Transactions on Electron Devices, 2016, 63(3): 946-953.
[4] VELAMALA J B, SUTARIA K, SATO T, et al. Physics matters: statistical aging prediction under trapping/detrapping[C] // Proceedings of DAC Design Automation Conference. San Francisco, CA, USA, 2012:139-144.
[5] WANG W P, YANG S Q, BHARDWAJ S, et al. The impact of NBTI effect on combinational circuit: modeling, simulation, and analysis [J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2010, 18(2):173-183.
[6] RZEPA G, GOES W, ROTT G, et al. Physical modeling of NBTI: from individual defects to devices[C]// Proceedings of International Conference on Simulation of Semiconductor Processes and Devices. Yokohama, Japan,2014: 81-84.
[7] MAHAPATRA S, GOEL N, DESAI S, et al. A comparative study of different physics-based NBTI models [J]. IEEE Transactions on Electron Devices, 2013, 60(3):901-916.
[8] JOSHI K,MUKHOPADHYAY S,GOEL N,et al.A consistent physical framework for n and p BTI in HKMG MOSFETs[C]// Proceedings of IEEE International Reliability Physics Symposium.Anaheim,CA,USA,2012:5A.3.1-5A.3.10.
[9] BHARDWAJ S, WANG W P, VATTIKONDA R, et al. Predictive modeling of the NBTI effect of reliable design [C] // Proceedings of IEEE Custom Integrated Circuits Conference. San Jose, CA, USA, 2006: 189-192.
[10] WANG Y L, LI X J, QING J, et al. Analytical parameter extraction for NBTI reaction diffusion and trapping/detrapping models [J]. Microelectronics Reliability, 2016, 66:10-15.