基于FPGA的配电网暂态实时仿真研究(二):系统架构与算例验证
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  • 英文篇名:Real-time Transient Simulation for Distribution Systems Based on FPGA, Part Ⅱ: System Architecture and Algorithm Verification
  • 作者:王成山 ; 丁承第 ; 李鹏 ; 于浩
  • 英文作者:WANG Chengshan;DING Chengdi;LI Peng;YU Hao;Key Laboratory of Smart Grid of Ministry of Education (Tianjin University);
  • 关键词:配电网 ; 暂态实时仿真 ; 现场可编程门阵列 ; 系统架构
  • 英文关键词:distribution system;;transient real-time simulation;;field-programmable gate array(FPGA);;system architecture
  • 中文刊名:ZGDC
  • 英文刊名:Proceedings of the CSEE
  • 机构:智能电网教育部重点实验室(天津大学);
  • 出版日期:2014-01-10 15:11
  • 出版单位:中国电机工程学报
  • 年:2014
  • 期:v.34;No.483
  • 基金:国家自然科学基金项目(51207100,51261130473);; 国家重点基础研究发展计划项目(973项目)(2009CB219700);; 高等学校博士学科点专项科研基金资助项目(20120032130008)~~
  • 语种:中文;
  • 页:ZGDC201404015
  • 页数:7
  • CN:04
  • ISSN:11-2107/TM
  • 分类号:126-132
摘要
有源配电网暂态实时仿真需要较强的计算能力作为支持,因此提出基于现场可编程门阵列的有源配电网暂态实时仿真中系统级并行、模块级并行以及底层并行的多层级并行架构,并研究了各层级并行的实现方式。利用模块级并行以及底层并行的设计思想,使用Verilog HDL语言开发了基于浮点数运算的配电网暂态实时仿真系统。为验证该实时仿真系统的有效性,选取典型配电网络并以2?s的仿真步长进行了实时仿真测试,充分验证了所提配电网暂态实时仿真系统在仿真速度、仿真规模方面的优势,通过与Matlab/SimPowerSystems的计算结果进行比较,验证了该系统的仿真精度。
        Real-time transient simulation for active distribution network requires very high computational capability. This paper proposed multi-level parallel architecture of real-time transient simulator for active distribution system based on field-programmable gate array(FPGA), involving system level, module level and elementary level. A real-time simulator for distribution system considering module level and elementary level parallelism was proposed. The simulator was designed by Verilog hardware description language and based on floating-point arithmetic calculation. In order to validate the developed simulator, a typical distribution network was simulated in the real-time simulator using a time-step of 2 ?s, which fully demonstrated the advantages of the simulator on execution speed and simulation scale. The simulation results show great coherence with the offline simulation in Matlab/ SimPowerSystems.
引文
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