基于共面传输线的太赫兹片上系统的研究
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  • 英文篇名:Study of terahertz on-chip system based on coplanar transmission line
  • 作者:吴蕊 ; 苏波 ; 文毅伟 ; 何敬锁 ; 崔海林 ; 张存林
  • 英文作者:WU Rui;SU Bo;WEN Yiwei;HE Jingsuo;CUI Hailin;ZHANG CunLin;Department of Physics, Capital Normal University Key Laboratory of the terahertz optoelectronics,Ministry of Education, Terahertz spectroscopy and imaging Beijing Key Laboratory, Beijing Advanced Innovation Center for imaging Theory and Technology;
  • 关键词:共面传输线 ; 片上系统 ; 太赫兹波 ; 传输特性
  • 英文关键词:coplanar transmission lines;;on-chip system;;terahertz waves;;transmission properties
  • 中文刊名:GXJS
  • 英文刊名:Optical Technique
  • 机构:首都师范大学物理系太赫兹光电子学教育部重点实验室太赫兹波谱与成像北京市重点实验室北京成像理论与技术高精尖创新中心;
  • 出版日期:2019-03-15
  • 出版单位:光学技术
  • 年:2019
  • 期:v.45;No.256
  • 基金:国家自然科学基金(61575131,61675138,61575130);; 北京市教育委员会科技计划一般资助项目(SQKM201810028004)
  • 语种:中文;
  • 页:GXJS201902015
  • 页数:5
  • CN:02
  • ISSN:11-1879/O4
  • 分类号:83-87
摘要
太赫兹片上系统是将太赫兹的产生、传输和探测都集中在一个几平方厘米的基片上,线宽及间距达到微米量级,具有集成化程度高、系统尺寸小、稳定性好以及操作简便的特点,有利于与微量样品检测技术相互结合。研究采用HFSS软件对共面波导和共面带状线两种太赫兹共面传输线进行了仿真计算,通过优化传输线的宽度、长度、基底的厚度等关键几何参数确定出最佳的传输线结构;研究工作重点对太赫兹波段的共面带状线结构进行了设计和优化,实现了在介电常数很小的BCB基底上的低损耗传输。所得到的最佳结构参数为线宽及间距均为20μm,此结构为后续片上系统实物芯片的制作提供了参数依据。
        The THz on-chip system concentrates the generation, transmission and detection of THz on a substrate of several square centimeters. Linewidth and spacing reach micron level, which has the advantages of high integration, small system size, good stability and simple operation, is conducive to the combination of micro-sample detection technology. Two kinds of terahertz coplanar transmission lines, coplanar waveguide and coplanar stripline, are simulated by HFSS software. The optimal transmission line structure is determined by optimizing the key geometric parameters such as the width, length and thickness of the transmission line. The research focuses on the design and optimization of coplanar stripline structure in terahertz band, and achieves low loss transmission on BCB substrate with very small dielectric constant. The optimum structure parameters obtained are line width and spacing of 20μm. This structure provides a parameter basis for the subsequent fabrication of system-on-chip physical chips.
引文
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