CAN总线控制器IP设计
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摘要
CAN总线是面向工业测控系统通信应用的有效解决方案,文中提出一种高可靠性、高实时性和低成本的CAN总线控制器IP核设计方案。该IP核采用Verilog硬件描述语言,实现了CAN2. 0数据链路层协议,具备查错纠错能力,总线参数灵活可配满足不同应用需求。此外,将CAN总线控制器集成到片上系统,搭建完整FPGA验证平台,设计的CAN总线控制器作为CAN总线上的一个节点,验证该IP核的功能。实验结果表明,该CAN总线满足应用需求,控制器传输速率达到1 Mbit·s~(-1),传输报文丢失率低。
The CAN bus was an efficient solution for real-time and high-speed communication in industrial application. This paper proposed a CAN bus controller IP core design with high reliability,high real-time and low-cost application. With the usage of Verilog,the logical link layer of CAN2. 0 protocol was implemented by the IP core which was capable of error check and correcting. Besides,the CAN bus could be flexibly equipped to meet different application needs. Additionally,the CAN bus controller was integrated into a system-on-chip and a FPGA platform was set up for function verification and performance estimation. As a node on the CAN bus,the CAN bus controller was responsible for the verification of the IP core function. The experiment result showed the transmission rate of the IP could achieve 1 Mbit·s~(-1) and the loss rate was very low.
The CAN bus was an efficient solution for real-time and high-speed communication in industrial application. This paper proposed a CAN bus controller IP core design with high reliability,high real-time and low-cost application. With the usage of Verilog,the logical link layer of CAN2. 0 protocol was implemented by the IP core which was capable of error check and correcting. Besides,the CAN bus could be flexibly equipped to meet different application needs. Additionally,the CAN bus controller was integrated into a system-on-chip and a FPGA platform was set up for function verification and performance estimation. As a node on the CAN bus,the CAN bus controller was responsible for the verification of the IP core function. The experiment result showed the transmission rate of the IP could achieve 1 Mbit·s~(-1) and the loss rate was very low.
引文
[1]陈国伟,丁学明.基于CAN总线的无刷直流电机控制系统设计[J].电子科技,2017,30(3):153-156.
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[6]熊贤超. CAN总线测试与仿真平台的系统设计[D].上海:上海工程技术大学,2016.
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[9]黄煜,王浩,刘文帅,等.基于CAN总线的水下通信系统设计[J].舰船科学技术,2015,37(8):146-148.
[10]赵静.基于FPGA的CAN总线通讯仿真与测试平台[D].上海:上海师范大学,2013.
[11]李平,魏长宝. CAN总线检测系统的多接口设计研究[J].电子器件,2015,38(4):917-921.
[12]商伟峰.基于FPGA的1553B总线与CAN总线数据转换器设计与实现[D].杭州:杭州电子科技大学,2015.
[13]李博,李晓强.基于CAN总线的智能控制器设计[J].电子设计工程,2015,23(10):121-124.
[14]李晶.基于选择性样本的CAN总线故障建模与分析[D].杭州:浙江大学,2017.
[15]王晓华.基于CAN总线的高精度称重传感器节点设计[J].现代电子技术,2017,40(13):38-40.
[2]孙毅超.考虑错误的CAN总线消息延时分布情况研究[D].杭州:浙江大学,2016.
[3]李建,张喜文,黄勇.基于C8051F560的CAN总线通信节点设计[J].电子科技,2017,30(6):77-81.
[4]巩少梁.基于2. 0协议的CAN总线控制器的设计[D].哈尔滨:哈尔滨理工大学,2014.
[5]张正扬,刘方.一种基于CAN总线的电动车电池管理系统[J].电子科技,2014,27(3):129-132.
[6]熊贤超. CAN总线测试与仿真平台的系统设计[D].上海:上海工程技术大学,2016.
[7]赵强,田泽,楼小强,等. CAN总线控制器IP核设计实现[J].计算机技术与发展,2013,23(8):230-233.
[8]秦慧敏.基于CAN总线的数据采集系统设计[D].长春:吉林大学,2016.
[9]黄煜,王浩,刘文帅,等.基于CAN总线的水下通信系统设计[J].舰船科学技术,2015,37(8):146-148.
[10]赵静.基于FPGA的CAN总线通讯仿真与测试平台[D].上海:上海师范大学,2013.
[11]李平,魏长宝. CAN总线检测系统的多接口设计研究[J].电子器件,2015,38(4):917-921.
[12]商伟峰.基于FPGA的1553B总线与CAN总线数据转换器设计与实现[D].杭州:杭州电子科技大学,2015.
[13]李博,李晓强.基于CAN总线的智能控制器设计[J].电子设计工程,2015,23(10):121-124.
[14]李晶.基于选择性样本的CAN总线故障建模与分析[D].杭州:浙江大学,2017.
[15]王晓华.基于CAN总线的高精度称重传感器节点设计[J].现代电子技术,2017,40(13):38-40.