500V增强型与耗尽型集成VDMOS器件设计
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摘要
增强型与耗尽型集成VDMOS器件是LED驱动电路中一种高效、低成本的功率器件。其设计制造要解决的主要问题是两种VDMOS器件工艺的集成问题和两种器件之间的隔离问题。提出一种隔离良好、芯片面积较小的增强型与耗尽型集成VDMOS设计和制造方法,耗尽管位于增强管里面比耗尽管位于增强管外面时耗尽管芯片面积减小74%。测试结果表明500 V增强型VDMOS击穿电压BVDSS平均值为550 V,耗尽型VDMOS击穿电压BVDSX平均值为540 V,增强型VDMOS平均阈值电压VTH为3.2 V,耗尽型VDMOS平均阈值电压VP为-3.7 V,两种管子总良率在94%以上,达到预期的设计目的,并成功应用于LED等产品中。
Enhancement and depletion integrated VDMOS devices are efficient and low-cost power devices for LED drive circuits. The main problems to be solved in the design and fabrication are the integration of two kinds of VDMOS processes and the isolation between the two devices. Methods of design and manufacture are provided for enhancement and depletion integrated VDMOS devices to get excellent isolation and small chip area in this paper. The area of the depletion mode VDMOS device decreases by 74% when it lies inside the enhancement mode tube compared with lying outside the enhancement mode tube. Test results show that average breakdown voltage BVDSSof enhancement mode tube is 550 V and average breakdown voltage BVDSXof depletion mode tube is 540 V. Average threshold voltage VTHof enhancement mode VDMOS is 3.2 V, and that of depletion mode VDMOS is-3.7 V. The total yield was above 94%. The design has achieved the desired purpose, and the devices have been successfully applied to LED products.
Enhancement and depletion integrated VDMOS devices are efficient and low-cost power devices for LED drive circuits. The main problems to be solved in the design and fabrication are the integration of two kinds of VDMOS processes and the isolation between the two devices. Methods of design and manufacture are provided for enhancement and depletion integrated VDMOS devices to get excellent isolation and small chip area in this paper. The area of the depletion mode VDMOS device decreases by 74% when it lies inside the enhancement mode tube compared with lying outside the enhancement mode tube. Test results show that average breakdown voltage BVDSSof enhancement mode tube is 550 V and average breakdown voltage BVDSXof depletion mode tube is 540 V. Average threshold voltage VTHof enhancement mode VDMOS is 3.2 V, and that of depletion mode VDMOS is-3.7 V. The total yield was above 94%. The design has achieved the desired purpose, and the devices have been successfully applied to LED products.
引文
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[2]BOLOTNIKOV A V,PETER G M,ZHANG Q C,et al.Junction termination extension implementing drive-in diffusion of boron for high-voltage SIC devices[J].IEEETrans Electron Devices,2010,57(8):1930-1935.
[3]宋文斌,蔡小五.一种新型高压功率器件终端技术[J].微电子学,2011,41(4):567-569.
[4]TEMPLE V A K.Junction termination extension,a new technique for increasing avalanche breakbown voltage and controlling surface electric field in p-n junctions[C].IEEEElectron Dev Meet Digast,1977,23:143-149.
[5]Daniel M,Kinzer,Riverside,Calif.DEPLETION MODEPOWER MOSFET WITH REFACTORY GATE ANDMETHOD OF MAKING SAME[P].US Patent,Patent Number:US005472888A,Date of Patent:Dec 5,1995.
[6]赵圣哲,马万里.一种耗尽型VDMOS器件及其制作方法[P].中国,CN 105336785 A,2016.02.17.
[7]马万里,陈兆同,赵圣哲.一种耗尽型VDMOS器件及其制造方法[P].中国,CN 1054448733 A,2016.03.30.
[8]李维聪,李海松,孙伟锋.500 V耗尽型NLDMOS器件研究[J].半导体技术,2006,33(9):772-775.
[9]ZHANG Bo.Power Semiconductor Devices and Smart Power ICs[M].第3版,成都:电子科技大学出版社,2007:316-322.
[10]陈星弼.高压功率集成电路[M].南京:东南大学出版社,2000:98-102.
[11]B J BALIGA.Fundamentals of Power Semiconductor Devices[M].New York:Springer Science,1998:46-51.
[12]PIERRET RF.Semiconductor Device Fundamentals[M].北京:电子工业出版社,1996:25-30.