基于时间交替采样技术的高速高精度ADC系统
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摘要
介绍了一种基于时间交替采样结构的高速ADC系统,整个系统采用全数字方式实现时间交替采样技术,结构灵活多变。使用2片ADC芯片及外围电路、FPGA作为逻辑控制和数据接收缓存,来搭建时间交替ADC系统的硬件电路。其最高采样率可达400 Msample/s,采样精度为12 bit。通过分析时间交替ADC系统的原理及其通道误差特性,利用Matlab分析通道失配误差来源,对采集到的数据进行误差估计和校正。
A high-speed ADC system based on time-interleaving technology is introduced,it realized the time-interleaving technology in digital way,and the system is flexible. Using two ADC chips and other peripheral equipments,with FPGA as the logic control and data receive cache the hardware circuit of ADC sampling system is built based on time-interleaving technology. The maximal sample rate of this system is up to 400 Msample/s,and the precision is 12 bit. By means of analyzing the time-interleaved ADC system and its channel mismatch error,Matlab is uesd to analyse the source of the channel mismatch error as well as estimate and calibrate the errors of the collected data.
A high-speed ADC system based on time-interleaving technology is introduced,it realized the time-interleaving technology in digital way,and the system is flexible. Using two ADC chips and other peripheral equipments,with FPGA as the logic control and data receive cache the hardware circuit of ADC sampling system is built based on time-interleaving technology. The maximal sample rate of this system is up to 400 Msample/s,and the precision is 12 bit. By means of analyzing the time-interleaved ADC system and its channel mismatch error,Matlab is uesd to analyse the source of the channel mismatch error as well as estimate and calibrate the errors of the collected data.
引文
[1]常高嘉,冯全源.基于FPGA的高速数据采集系统的设计与实现[J].电子器件,2012,35(5):615-618.
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[3]朱子翰.多通道数据采集系统的研究与设计[D].成都:电子科技大学,2012.
[4]朱子翰,吕幼新.时间交替采样系统的误差测量与FPGA实现[J].电子测量技术,2011,34(3):54-56.
[5]陈珏利,曾成志,郑海荣.基于ADS6122和FPGA的多通道信号采集系统的设计[J].电子器件,2012,35(4):406-411.
[6]洪亮.高速并行交替采样ADC系统的研究与实现[D].上海大学,2009.
[7]吴高奎,严济鸿,何子述,等.基于Farrow结构的分数时延滤波器[J].雷达科学与技术,2010,8(3):269-272.
[8]刘艳茹,田书林,王志刚,等.一种基于Farrow滤波器的并行采样时间误差校正[J].电子测量与仪器学报,2010,24(1):50-54.
[2]张鹏,杜彬彬,任勇峰.基于FPGA的超声数据采集装置的设计与实现[J].电子器件,2014,37(1):81-84.
[3]朱子翰.多通道数据采集系统的研究与设计[D].成都:电子科技大学,2012.
[4]朱子翰,吕幼新.时间交替采样系统的误差测量与FPGA实现[J].电子测量技术,2011,34(3):54-56.
[5]陈珏利,曾成志,郑海荣.基于ADS6122和FPGA的多通道信号采集系统的设计[J].电子器件,2012,35(4):406-411.
[6]洪亮.高速并行交替采样ADC系统的研究与实现[D].上海大学,2009.
[7]吴高奎,严济鸿,何子述,等.基于Farrow结构的分数时延滤波器[J].雷达科学与技术,2010,8(3):269-272.
[8]刘艳茹,田书林,王志刚,等.一种基于Farrow滤波器的并行采样时间误差校正[J].电子测量与仪器学报,2010,24(1):50-54.