AD9832芯片在10.24MHz频率变换器中的应用
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摘要
介绍了一种由10MHz高稳参考源生成10.24 MHz高稳信号的频率变换器解决方案。这种设计方案基于直接数字频率合成技术(DDS),对于DDS器件不再使用内部或外部高次倍频电路,输出频率、相位可步进调节。合成的10.24MHz信号经过后续噪声抑制、滤波处理后可作为锁相环电路的高稳时钟参考,进而提高锁相环电路输出信号频率的准确度和稳定度。
This paper introduced a frequency converter from 10 MHz to 10.24 MHz.In this digitalproject,we used MCU and DDS(direct digital frequency synthesis),the multiplier is not be used in this DDS circuit,and the frequency and phase can be flexible adjusted.The synthesized 10.24 MHz signal can be used as a stable reference clock for PLL circuit after noise suppression and filtering,thus improving the accuracy and stability of the output signal frequency of PLL circuit.
This paper introduced a frequency converter from 10 MHz to 10.24 MHz.In this digitalproject,we used MCU and DDS(direct digital frequency synthesis),the multiplier is not be used in this DDS circuit,and the frequency and phase can be flexible adjusted.The synthesized 10.24 MHz signal can be used as a stable reference clock for PLL circuit after noise suppression and filtering,thus improving the accuracy and stability of the output signal frequency of PLL circuit.
引文
[1]MOTOROLA Inc.MC145152DATASHEET[EB/OL].(1995-03-18)[2018-09-28].http://html.alldatasheet.com/htmlpdf/77362/MOTOROLA/MC145152/322/1/MC145152.html.
[2]王庸,董天临.铷原子频标最终频率变换级的设计[J].现代电子技术,2004,174(7):28-31.
[3]ANALOG DEVICE.AD9832DATASHEET[EB/OL].(1999-08-11)[2019-09-29].http://www.analog.com/static/imported-files/data_sheets/AD9832.pdf.
[4]ATMEL.ATmega48DATASHEET[EB/OL].(2011-03-09)[2018-06-26].http://ishare.iask.sina.com.cn/download/explain.php?fileid=15339134.
[5]TEXAS INSTRUMENTS.74HC86DATASHEET[EB/OL].(2016-07-26)[2018-09-11].http://focus.ti.com.cn/cn/lit/ds/symlink/sn7486.pdf.
[6]阎世栋,孙兵锋,钟达,等.一种可编程逻辑器件在原子钟频率综合电路中的应用[J].时间频率学报,2012,35(2):76-81.
[7]贾晓斌,刘四新,贾海亮.基于DDS的椭圆函数低通滤波器的设计[J].电子设计工程,2010,18(9):171-173.
[8]RIORDAN L.AD9832/AD9835编程示例[EB/OL].(2011-02-01)[2018-09-26].http://www.analog.com/static/imported-files/zh/application_notes/AN-1108_cn.pdf.
[9]秦蕾,高伟,陈智勇,等.一种铷原子频标射频倍频单元的实现[J].时间频率学报,2009,32(1):6-11.
[10]孙兵锋,阎世栋,王鹏飞,等.小型化铷原子频标数字锁频环路设计与实现[J].计量学报,2015,36(4):436-440.
[11]白振强.小型化数字式频率合成器的设计与实现[D].成都:电子科技大学,2016.
[2]王庸,董天临.铷原子频标最终频率变换级的设计[J].现代电子技术,2004,174(7):28-31.
[3]ANALOG DEVICE.AD9832DATASHEET[EB/OL].(1999-08-11)[2019-09-29].http://www.analog.com/static/imported-files/data_sheets/AD9832.pdf.
[4]ATMEL.ATmega48DATASHEET[EB/OL].(2011-03-09)[2018-06-26].http://ishare.iask.sina.com.cn/download/explain.php?fileid=15339134.
[5]TEXAS INSTRUMENTS.74HC86DATASHEET[EB/OL].(2016-07-26)[2018-09-11].http://focus.ti.com.cn/cn/lit/ds/symlink/sn7486.pdf.
[6]阎世栋,孙兵锋,钟达,等.一种可编程逻辑器件在原子钟频率综合电路中的应用[J].时间频率学报,2012,35(2):76-81.
[7]贾晓斌,刘四新,贾海亮.基于DDS的椭圆函数低通滤波器的设计[J].电子设计工程,2010,18(9):171-173.
[8]RIORDAN L.AD9832/AD9835编程示例[EB/OL].(2011-02-01)[2018-09-26].http://www.analog.com/static/imported-files/zh/application_notes/AN-1108_cn.pdf.
[9]秦蕾,高伟,陈智勇,等.一种铷原子频标射频倍频单元的实现[J].时间频率学报,2009,32(1):6-11.
[10]孙兵锋,阎世栋,王鹏飞,等.小型化铷原子频标数字锁频环路设计与实现[J].计量学报,2015,36(4):436-440.
[11]白振强.小型化数字式频率合成器的设计与实现[D].成都:电子科技大学,2016.