一种用于ECG信号采集的低功耗仪表放大器
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摘要
设计了一种用于心电图信号采集的电流反馈型仪表放大器。输入级采用折叠共源共栅结构,有效提高了共模抑制比。采用电流分流技术,设计了小跨导值G_m-C高通滤波器,实现了人体低频噪声的隔离和直流失调的抑制。该仪表放大器采用TSMC 0.18μm CMOS工艺进行设计。结果表明,在1.8 V电源电压下,功耗为168.8μW。在0.2～200 Hz带宽范围内,增益为35.7 dB,共模抑制比为142.1 dB,输入参考噪声为■Hz。
A current feedback instrumentation amplifier(CFIA) was designed for the electrocardiogram(ECG) signal acquisition applications. At the input stage, the folded cascode structure was used to improve the common mode rejection ratio. Small G_m-C high-pass filters were implanted in this circuit based on the current division technology, so as to isolate the low frequency noise from human body and to suppress the DC offset. The proposed CFIA was designed in TSMC 0.18 μm CMOS process. The simulation results showed that the circuit consumed 168.8 μW at 1.8 V, and achieved a gain of 35.7 dB and a common mode rejection rate of 142.1 dB in a bandwidth from 0.2 to 202 Hz. The input referred noise of this CFIA circuit was ■ Hz.
A current feedback instrumentation amplifier(CFIA) was designed for the electrocardiogram(ECG) signal acquisition applications. At the input stage, the folded cascode structure was used to improve the common mode rejection ratio. Small G_m-C high-pass filters were implanted in this circuit based on the current division technology, so as to isolate the low frequency noise from human body and to suppress the DC offset. The proposed CFIA was designed in TSMC 0.18 μm CMOS process. The simulation results showed that the circuit consumed 168.8 μW at 1.8 V, and achieved a gain of 35.7 dB and a common mode rejection rate of 142.1 dB in a bandwidth from 0.2 to 202 Hz. The input referred noise of this CFIA circuit was ■ Hz.
引文
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[3] SHOJAEI-BAGHINI M,LAI R K,SHARMA D K.A low-power and compact analog CMOS processing chip for portable ECG recorders [C] // IEEE Asian Sol Sta Circ Conf.Hsinchu,China.2005:473-476.
[4] SHARMA B P,MEHRA R.Design of CMOS instrumentation amplifier with improved gain & CMRR for low power sensor applications [C] // IEEE Int Conf Next Gener Comput Technol.Dehradun,India.2017:72-77.
[5] PARASKEVOPOULOU S E,EFTEKHAR A,KULASEKERAM N,et al.A low-noise instrumentation amplifier with DC suppression for recording ENG signals [C] // 37th Annu Int Conf IEEE EMBC.Milan,Italy.2015:2693-2696.
[6] PERTIJS M A P,KINDT W J.A 140 dB-CMRR current-feedback instrumentation amplifier employing ping-pong auto-zeroing and chopping [J].IEEE J Sol Sta Circ,2010,45(10):2044-2056.
[7] BUTTI F,PIOTTO M,BRUSCHI P.A chopper instrumentation amplifier with input resistance boosting by means of synchronous dynamic element matching [J].IEEE Trans Circ & Syst I:Regu Pap,2017,64(4):753-764.
[8] WORAPISHET A,DEMOSTHENOUS A,LIU X.A CMOS instrumentation amplifier with 90-dB CMRR at 2-MHz using capacitive neutralization:analysis,design considerations,and implementation [J].IEEE Trans Circ & Syst I:Regu Pap,2011,58(4):699-710.
[9] VEERAVALLI A,SANCHEZ-SINENCIO E,SILVA-MARTINEZ J.Transconductance amplifier structures with very small transconductances:a comparative design approach [J].IEEE J Sol Sta Circ,2002,37(6):770-775.