一种高速SpaceWire系统设计与验证
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  • 英文篇名:Design and Verification of High-Speed SpaceWire System
  • 作者:姜宏 ; 刘淑芬 ; 陈龙
  • 英文作者:JIANG Hong;LIU Shufen;CHEN Long;Beijing Institute of Control Engineering;
  • 关键词:SpaceWire ; 终端节点 ; 路由器 ; FPGA设计 ; 测试验证
  • 英文关键词:spacewire;;terminal node;;router;;FPGA design;;testing verification
  • 中文刊名:KJKZ
  • 英文刊名:Aerospace Control and Application
  • 机构:北京控制工程研究所;
  • 出版日期:2019-06-15
  • 出版单位:空间控制技术与应用
  • 年:2019
  • 期:v.45;No.264
  • 基金:十三五民用航天(D020405)~~
  • 语种:中文;
  • 页:KJKZ201903011
  • 页数:8
  • CN:03
  • ISSN:11-5664/V
  • 分类号:74-81
摘要
标准SpaceWire总线技术虽然在航天器上应用广泛,但是存在传输速率低的弱点.针对这一不足,首先提出了一种高速SpaceWire系统架构.在此基础上开展了吉比特级SpaceWire终端节点和路由器的FPGA设计,解决了终端节点的物理接口、片上总线、DMA,以及路由节点目的端口仲裁模块和组寻址路由模块设计中的关键问题.在测试验证部分,开展了数据传输测试、误码率测试和数据传输率测试,测试结果表明高速SpaceWire系统已具备路由和终端节点的主要功能、指标较先进,具有良好的航天应用前景.
        Although the standard SpaceWire is widely used in spacecraft,there are weaknesses in the low transmission rate. To cope with this disadvantage,a gigabit level SpaceWire system architecture is proposed firstly in this paper. Based on this,the FPGA-based design of high-speed SpaceWire terminal nodes and routers is carried out,in which the key problems are solved,such as: physical interfaces,onchip bus,DMA,destination port arbitration module and group addressing routing module. In the testing and verification part,data transmission test,bit error rate test and data transmission rate test are carried out. The testing results show that the high-speed SpaceWire system has advanced indicators and essential functions for routers and terminals,and has good prospects for space applications.
引文
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