一种10位200ksps双模式循环型模数转换器的设计
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摘要
为解决大多数循环型(cyclic)模数转换器(analog-to-digital convertor, ADC)不能实现双输入模式的问题,提出了一种10位的可实现单端和差分两种输入模式的cyclic ADC结构.采用RSD算法,实现对比较器阈值偏差的修正,提出一种两级自补偿结合增益自举的改进型运放结构,在实现高增益的同时,能够保证输出结果不受环路失调影响.仿真结果表明在5.2 MHz工作时钟和2.5 V电源电压下,提出的cyclic ADC实现了200 ksps的转换速度,信噪比60.98 dB,有效位数9.8 bit,功耗4.97 mW,版图面积0.059 mm2.研究结论表明该电路有较高的转换速度和精度,且由于能够实现单端和差分两种输入模式,使得该电路的适用范围得到了扩展.
In order to solve the problem that most cyclic ADCs can not implement dual input modes, a 10-bit cyclic ADC with single-ended input mode and differential input mode is proposed in this paper. By using RSD algorithm, the threshold deviation of comparators is corrected. And improved operational amplifier structure with two-stage self-compensation and gain boosted is proposed, which can achieve high gain and ensures that the output result is not affected by loop offset. Simulation results show that the proposed cyclic ADC has a conversion speed of 200 ksps under a 5.2 MHz working clock and 2.5 V supply, the signal to noise ratio is 60.98 dB, the effective number of bits is 9.8 bit, the power dissipation is 4.97 m W, and the layout area is 0.059 mm2. The research conclusion indicates that the circuit has relatively high conversion speed and precision, and the applicability of the circuit is extended due to the dual input modes.
In order to solve the problem that most cyclic ADCs can not implement dual input modes, a 10-bit cyclic ADC with single-ended input mode and differential input mode is proposed in this paper. By using RSD algorithm, the threshold deviation of comparators is corrected. And improved operational amplifier structure with two-stage self-compensation and gain boosted is proposed, which can achieve high gain and ensures that the output result is not affected by loop offset. Simulation results show that the proposed cyclic ADC has a conversion speed of 200 ksps under a 5.2 MHz working clock and 2.5 V supply, the signal to noise ratio is 60.98 dB, the effective number of bits is 9.8 bit, the power dissipation is 4.97 m W, and the layout area is 0.059 mm2. The research conclusion indicates that the circuit has relatively high conversion speed and precision, and the applicability of the circuit is extended due to the dual input modes.
引文
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[9]K Hwang.Computer Arithmetic-principles architecture and VLSI design[M].New York:John Wiley&Sons Inc,1979:226-229.
[10]蒋颖丹,田应洪,马聪,等.低功耗流水线ADC中多阈值比较器的设计[J].微电子学,2010(5):649-652.JIANG Yingdan,TIAN Yinghong,MA Cong,et al.Design of low power multi-threshold comparator for pipelined ADC[J].Microelectronics,2010(5):649-652.
[2]ZHAO Hongliang,ZHAO Yiqiang,GENG Junfeng,et al.A low-power10-bit 250-KSPS cyclic ADC with offset and mismatch correction[J].Journal of Semiconductors,2011(2):025008-1-025008-6.
[3]樊苗苗,张雅聪,鲁文高,等.用于红外焦平面读出电路的增量/循环混合型模数转换器[J].北京大学学报(自然科学版),2014(4):719-723.FAN Miaomiao,ZHANG Yacong,LU Wengao,et al.A hybrid incremental and cyclic ADC for IRFPA readout circuit[J].Acta Scientiarum Naturalium Universitatis Pekinensis,2014(4):719-723.
[4]唐雨晴,曾华林,谢亮,等.一种10位160 kS/s的循环型模数转换器[J].微电子学,2018(4):437-442.TANG Yuqing,ZENG Hualin,XIE Liang,et al.A 10 bit 160 k S/s cyclic ADC[J].Microelectronics,2018(4):437-442.
[5]HAN Ye,LI Quanliang,SHI Cong,et al.A 10-bit column-parallel cyclic ADC for high-speed CMOS image sensors[J].Journal of Semiconductors,2013(8):085016-1-085016-6.
[6]CHEN Yi,LI Fule,CHEN Hong,et al.A low power cyclic ADC design for a wireless monitoring system for orthopedic implants[J].Journal of Semiconductors,2009(8):085009-1-085009-6.
[7]刘丰,姚素英.12位低功耗RSD A/D转换器的改进设计与实现[J].南开大学学报(自然科学版),2011(6):6-10.LIU Feng,YAO Suying.Design improvement and implementation of 12bit low power RSD A/D converter[J].Journal of Nankai University(Natural Science Edition),2011(6):6-10.
[8]刘丰,姚素英,史再峰.CMOS图像传感器中RSD A/D转换器的设计与实现[J].光电子·激光,2008(10):1 312-1 314.LIU Feng,YAO Suying,SHI Zaifeng.Design and realization of RSD A/Dconverter in CMOS image sensors[J].Journal of Optoelectronics Laser,2008(10):1 312-1 314.
[9]K Hwang.Computer Arithmetic-principles architecture and VLSI design[M].New York:John Wiley&Sons Inc,1979:226-229.
[10]蒋颖丹,田应洪,马聪,等.低功耗流水线ADC中多阈值比较器的设计[J].微电子学,2010(5):649-652.JIANG Yingdan,TIAN Yinghong,MA Cong,et al.Design of low power multi-threshold comparator for pipelined ADC[J].Microelectronics,2010(5):649-652.