界面粗糙度对硅通孔结构界面分层的影响
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摘要
硅通孔(TSV)结构是三维互连封装的核心,针对其热可靠性问题,基于ANSYS有限元分析软件分别构建光滑和粗糙两种界面形貌的TSV结构分析模型,模拟计算了两种界面下TSV结构的热应力和界面分层裂纹尖端能量释放率,通过对比分析研究了界面粗糙度对TSV结构界面分层的影响。结果表明,温度载荷下粗糙界面上热应力呈现出明显的周期性非连续应力极值分布,且极值点位于粗糙界面尖端点。界面分层裂纹尖端能量释放率也呈周期性振荡变化。降温下,粗糙界面尖端点附近能量释放率明显大于光滑界面稳态能量释放率;升温下,粗糙界面能量释放率总体上呈现出先增大后减小的变化趋势。
Through silicon via(TSV)is the key structure in three dimensional interconnected packaging. Aiming at the thermal reliability, the TSV structure analysis models with smooth and rough interface morphologies were established based on ANSYS finite element analysis software. And the thermal stresses and the energy release rates at interface delamination crack tips in the TSV structure were also simulated and calculated, respectively. Through the comparison and analysis, the effects of interface roughness on interface delamination of the TSV structure were studied. The results show that obvious pe-riodically discontinuous stress extreme points appear along the rough interface under the temperature load. These stress extreme points almost locate at the convex points of the rough interface. And the energy release rates at the convex points of the rough interface also change periodically along the rough interface. Under the cooling condition, the energy release rates near the convex points of the rough interface are significantly greater than that of the steady state on the smooth interface. Under the heating condition, the energy release rates interface generally increase first and then decrease along the rough interface.
Through silicon via(TSV)is the key structure in three dimensional interconnected packaging. Aiming at the thermal reliability, the TSV structure analysis models with smooth and rough interface morphologies were established based on ANSYS finite element analysis software. And the thermal stresses and the energy release rates at interface delamination crack tips in the TSV structure were also simulated and calculated, respectively. Through the comparison and analysis, the effects of interface roughness on interface delamination of the TSV structure were studied. The results show that obvious pe-riodically discontinuous stress extreme points appear along the rough interface under the temperature load. These stress extreme points almost locate at the convex points of the rough interface. And the energy release rates at the convex points of the rough interface also change periodically along the rough interface. Under the cooling condition, the energy release rates near the convex points of the rough interface are significantly greater than that of the steady state on the smooth interface. Under the heating condition, the energy release rates interface generally increase first and then decrease along the rough interface.
引文
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[3] 袁琰红.硅通孔三维封装的热力学分析 [D].上海:上海交通大学,2013.
[4] 黄春跃,梁颖,熊国际,等.基于热-结构耦合的3D-TSV互连结构的应力应变分析 [J].电子元件与材料,2014,33(7):85-90.HUANG C Y,LIANG Y,XIONG G J,et al.Study on stress and strain of 3D-TSV stacked IC packages based on thermal-structure coupling [J].Electronic Components and Materials,2014,33(7):85-90(in Chinese).
[5] 魏丽,陆向宁,郭玉静.硅通孔形状和填充材料对热应力的影响 [J].南京理工大学学报,2018,42(3):364-369.WEI L,LU X N,GUO Y J.Influences of shape and filling material of through silicon via on thermal stress [J].Journal of Nanjing University of Science and Technology,2018,42(3):364-369(in Chinese).
[6] HSIEH M C,WU S T,WU C J,et al.Energy release rate estimation for through silicon vias in 3-D IC integration [J].IEEE Transactions on Components,Packaging and Manufacturing Technology,2014,4(1):57-65.
[7] 董刚,刘荡,石涛,等.多个硅通孔引起的热应力对迁移率和阻止区的影响 [J].物理学报,2015,64(17):273-280.DONG G,LIU D,SHI T,et al.Effects of thermal stress induced by mulitiple through silicon vias on mobility and keep out zone [J].Acta Physica Sinica,2015,64(17):273-280(in Chinese).
[8] 薛彤,张国华,杨轶博.多种结构硅通孔热应力仿真分析 [J].微电子学,2015,45(6):820-824.XUE T,ZHANG G H,YANG Y B.Thermal-stress analysis on several kinds of structures of TSV [J].Microelectronics,2015,45(6):820-824(in Chinese).
[9] LU K H,RYU S K,ZHAO Q,et al.Thermal stress induced delamination of through silicon vias in 3-D interconnects [C] ∥Proceedings of the 60th Electronic Components and Technology Conference.Las Vegas,NV,USA,2010:40-45.
[10] RYU S K,LU K H,ZHANG X F,et al.Impact of near-surface thermal stresses on interfacial reliability of through-silicon vias for 3-D interconnects [J].IEEE Transactions on Device and Materials Reliability,2011,11(1):35-43.
[11] LIU X,CHEN Q,DIXIT P,et al.Failure mechanisms and optimum design for electroplated copper through-silicon vias(TSV) [C] ∥ Proceedings of the 59th Electronic Components and Technology Conference.San Diego,CA,USA,2009:624-629.
[12] 俞箭飞,江五贵.穿透硅通孔互连结构的湿-热应力有限元分析 [J].半导体技术,2012,37(11):889-893.YU J F,JIANG W G.Finite element analysis of the thermal-hygroscopic stress of the through silicon vias(TSV)interconnect structure [J].Semiconductor Technology,2012,37(11):889-893(in Chinese).
[13] 李玮.硅通孔界面应力分析 [D].北京:北京工业大学,2013.
[14] WU B Q,KUMAR A,PAMARTHY S.High aspect ratio silicon etch:a review [J].Journal of Applied Physics,2010,108(5):051101-1-051101-20.
[15] RANGANATHAN N,LEE D Y,LIU Y H,et al.Influence of Bosch etch process on electrical isolation of TSV structures [J].IEEE Transactions on Components,Packaging and Manufacturing Technology,2011,1(10):1497-1507.