相变存储器写寿命延长关键技术研究进展
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摘要
随着大数据分析应用时效性提升和"存储墙"问题日益突出,存储系统已成为当前计算机系统整体性能的瓶颈。以相变存储器(PCM)为代表的新型非易失性存储器(NVM)具有集成度高、功耗低、读写访问速度高、非易失、体积小和抗震等优良特性,已成为最具潜力的下一代存储设备。然而,写寿命有限是PCM实用化的一道障碍,如何通过减少写操作和磨损均衡以提升PCM使用寿命是当前的研究热点。从减少PCM写操作、均匀写操作分布以及在混合内存中的页面迁移等三个方面介绍了当前PCM写寿命延长技术的研究现状以及优缺点,最后探讨未来进一步改进PCM寿命可能的研究方向。
With the increasing demand for timeliness in big data analytics and the prominent"memory wall"problem,the storage system becomes the bottleneck of performance improvement of the overall computer systems.The novel non-volatile memory(NVM),especially phase change memory(PCM),has the advantages of high storage density,low power consumption,high read/write access speed,nonvolatility,small size and quakeproof ability.All these make PCM the most promising candidate for the next generation storage medium.Because of the limited write endurance of PCM,the researches on enhancing PCM lifetime by reducing write operations and performing wear-leveling on storage cell attract great attention from academia and industry.We introduce key techniques of write endurance improvement from three aspects of reducing PCM write operations,uniform distribution of write count,and page migration based on hybrid memory.Furthermore,we discuss their advantages and disadvantages.Finally,future research directions of further improvement on PCM lifetime are pointed out and discussed.
With the increasing demand for timeliness in big data analytics and the prominent"memory wall"problem,the storage system becomes the bottleneck of performance improvement of the overall computer systems.The novel non-volatile memory(NVM),especially phase change memory(PCM),has the advantages of high storage density,low power consumption,high read/write access speed,nonvolatility,small size and quakeproof ability.All these make PCM the most promising candidate for the next generation storage medium.Because of the limited write endurance of PCM,the researches on enhancing PCM lifetime by reducing write operations and performing wear-leveling on storage cell attract great attention from academia and industry.We introduce key techniques of write endurance improvement from three aspects of reducing PCM write operations,uniform distribution of write count,and page migration based on hybrid memory.Furthermore,we discuss their advantages and disadvantages.Finally,future research directions of further improvement on PCM lifetime are pointed out and discussed.
引文
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[26]Zhang Hong-bin,Fan Jie,Shu Ji-wu,et al.Summary of storage system and technology based on phase change memory[J].Journal of Computers Research and Development,2014,51(8):1647-1662.(in Chinese)
[27]Mao Wei,Liu Jing-ning,Tong Wei,et al.A review of storage technology research based on phase change memory[J].Chinese Journal of Computers,2015,38(5):944-960.(in Chinese)
[28]Lee S,Bahn H,Noh S H.CLOCK-DWF:A write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures[J].IEEE Transactions on Computers,2014,63(9):2187-2200.
[29]Chen K,Jin P,Yue L.A novel page replacement algorithm for the hybrid memory architecture involving PCM and DRAM[M]∥Network and Parallel Computing.Berlin:Springer Berlin Heidelberg,2014:108-119.
[30]Ramos L E,Gorbatov E,Bianchini R.Page placement in hybrid memory systems[C]∥Proc of International Conference on Supercomputing,2011:85-95.
[31]Seok H,Park Y,Park K W,et al.Efficient page caching algorithm with prediction and migration for a hybrid main memory[J].ACM Sigapp Applied Computing Review,2011,11(4):38-48.
[32]Wu Z,Jin P,Yang C,et al.APP-LRU:A new page replacement method for PCM/DRAM-based hybrid memory systems[M]∥Network and Parallel Computing.Berlin:Springer Berlin Heidelberg,2014:84-95.
[33]Zhang W,Li T.Exploring phase change memory and 3Ddiestacking for power/thermal friendly,fast and durable memory architectures[C]∥Proc of International Conference on Parallel Architectures and Compilation Techniques,2009:101-112.
[34]Fu Yin-jin,Xiao Nong,Liu Fang.Research and development of key techniques of data deduplication[J].Journal of Computers Research and Development,2012,49(1):12-21.(in Chinese)
[26]张鸿斌,范捷,舒继武,等.基于相变存储器的存储系统与技术综述[J].计算机研究与发展,2014,51(8):1647-1662.
[27]冒伟,刘景宁,童薇,等.基于相变存储器的存储技术研究综述[J].计算机学报,2015,38(5):944-960.
[34]付印金,肖侬,刘芳.重复数据删除关键技术研究进展[J].计算机研究与发展,2012,49(1):12-21.
[2]Burr G W,Kurdi B N,Scott J C,et al.Overview of candidate device technologies for storage-class memory[J].IBM Journal of Research&Development,2008,52(4):449-464.
[3]Lefurgy C,Rajamani K,Rawson F,et al.Energy management for commercial servers[J].Computer,2004,36(12):39-48.
[4]Wu X,Li J,Zhang L,et al.Hybrid cache architecture with disparate memory technologies[C]∥Proc of ACM International Symposium on Computer Architecture,2009:34-45.
[5]Zhou P,Zhao B,Yang J,et al.A durable and energy efficient main memory using phase change memory technology[J].ACM Sigarch Computer Architecture News,2009,37(3):14-23.
[6]Yang B D,Lee J E,Kim J S,et al.A low power phase-change random access memory using a data-comparison write scheme[C]∥Proc of IEEE International Symposium on Circuits and Systems,2007:3014-3017.
[7]Lee B C,Ipek E,Mutlu O,et al.Architecting phase change memory as a scalable DRAM alternative[J].ACM Sigarch Computer Architecture News,2009,37(3):2-13.
[8]Ferreira A P,Zhou M,Bock S,et al.Increasing PCM main memory lifetime[C]∥Proc of Design,Automation&Test in Europe Conference&Exhibition,2010:914-919.
[9]Cho S,Lee H.Flip-N-Write:A simple deterministic technique to improve PRAM write performance,energy and endurance[C]∥Proc of IEEE/ACM International Symposium on Microarchitecture,2009:347-357.
[10]Qureshi M K,Srinivasan V,Rivers J A.Scalable high performance main memory system using phase-change memory technology[C]∥Proc of ACM International Symposium on Computer Architecture,2009:24-33.
[11]Joo Y,Niu D,Dong X,et al.Energy-and endurance-aware design of phase change memory caches[C]∥Proc of Design,Automation&Test in Europe Conference&Exhibition,2010:136-141.
[12]Baek S,Lee H G,Nicopoulos C,et al.A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures[C]∥Proc of Great Lakes Symposium on VL-SI,2012:345-350.
[13]Park H,Yoo S,Lee S.Power management of hybrid DRAM/PRAM-based main memory[C]∥Proc of Design Automation Conference,2011:59-64.
[14]Park S K,Seok H,Shin D J,et al.PRAM wear-leveling algorithm for hybrid main memory based on data buffering,swapping,and shifting[C]∥Proc of ACM Symposium on Applied Computing,2012:1643-1644.
[15]Mladenov R.An efficient non-volatile main memory using phase change memory[C]∥Proc of International Conference on Computer Systems and Technologies,2012:45-51.
[16]Dong X,Wu X,Sun G,et al.Circuit and microarchitecture evaluation of 3Dstacking magnetic RAM(MRAM)as a universal memory replacement[C]∥Proc of Design Automation Conference,2008:554-559.
[17]Park S K,Min K M,Park K W,et al.Adaptive wear-leveling algorithm for PRAM main memory with a DRAM buffer[J].ACM Transactions on Embedded Computing Systems,2014,13(4):1-25.
[18]Dhiman G,Ayoub R,Rosing T.PDRAM:A hybrid PRAMand DRAM main memory system[C]∥Proc of ACM/IEEEDesign Automation Conference,2009:664-669.
[19]Park Y,Lim S H,Lee C,et al.PFFS:A scalable flash memory file system for the hybrid architecture of phase-change RAM and NAND flash[C]∥Proc of ACM Symposium on Applied Computing,2008:1498-1503.
[20]Dong J,Zhang L,Han Y,et al.Wear rate leveling:Lifetime enhancement of PRAM with endurance variation[C]∥Proc of IEEE Design Automation Conference,2011:972-977.
[21]Yun J,Lee S,Yoo S.Bloom filter-based dynamic wear leveling for phase-change RAM[C]∥Proc of Design,Automation&Test in Europe Conference&Exhibition,2012:1513-1518.
[22]Qureshi M K,Karidis J,Franceschini M,et al.Enhancing lifetime and security of PCM-based main memory with startgap wear leveling[C]∥Proc of IEEE/ACM International Symposium on Microarchitecture,2009:14-23.
[23]Wang J,Dong X,Xie Y,et al.i 2WAP:Improving non-volatile cache lifetime by reducing inter-and intra-set write variations[C]∥Proc of IEEE International Symposium on High Performance Computer Architecture,2013:234-245.
[24]Mittal S,Vetter J S,Li D.LastingNVCache:A technique for improving the lifetime of non-volatile caches[C]∥Proc of IEEE Computer Society Symposium on VLSI,2014:534-540.
[25]Syu S M,Shao Y H,Lin I C.High-endurance hybrid cache design in CMP architecture with cache partitioning and access-aware policy[C]∥Proc of ACM International Conference on Great Lakes Symposium on VLSI,2013:19-24.
[26]Zhang Hong-bin,Fan Jie,Shu Ji-wu,et al.Summary of storage system and technology based on phase change memory[J].Journal of Computers Research and Development,2014,51(8):1647-1662.(in Chinese)
[27]Mao Wei,Liu Jing-ning,Tong Wei,et al.A review of storage technology research based on phase change memory[J].Chinese Journal of Computers,2015,38(5):944-960.(in Chinese)
[28]Lee S,Bahn H,Noh S H.CLOCK-DWF:A write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures[J].IEEE Transactions on Computers,2014,63(9):2187-2200.
[29]Chen K,Jin P,Yue L.A novel page replacement algorithm for the hybrid memory architecture involving PCM and DRAM[M]∥Network and Parallel Computing.Berlin:Springer Berlin Heidelberg,2014:108-119.
[30]Ramos L E,Gorbatov E,Bianchini R.Page placement in hybrid memory systems[C]∥Proc of International Conference on Supercomputing,2011:85-95.
[31]Seok H,Park Y,Park K W,et al.Efficient page caching algorithm with prediction and migration for a hybrid main memory[J].ACM Sigapp Applied Computing Review,2011,11(4):38-48.
[32]Wu Z,Jin P,Yang C,et al.APP-LRU:A new page replacement method for PCM/DRAM-based hybrid memory systems[M]∥Network and Parallel Computing.Berlin:Springer Berlin Heidelberg,2014:84-95.
[33]Zhang W,Li T.Exploring phase change memory and 3Ddiestacking for power/thermal friendly,fast and durable memory architectures[C]∥Proc of International Conference on Parallel Architectures and Compilation Techniques,2009:101-112.
[34]Fu Yin-jin,Xiao Nong,Liu Fang.Research and development of key techniques of data deduplication[J].Journal of Computers Research and Development,2012,49(1):12-21.(in Chinese)
[26]张鸿斌,范捷,舒继武,等.基于相变存储器的存储系统与技术综述[J].计算机研究与发展,2014,51(8):1647-1662.
[27]冒伟,刘景宁,童薇,等.基于相变存储器的存储技术研究综述[J].计算机学报,2015,38(5):944-960.
[34]付印金,肖侬,刘芳.重复数据删除关键技术研究进展[J].计算机研究与发展,2012,49(1):12-21.