高帧率步进频穿墙成像雷达扫频方法
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摘要
步进频是穿墙成像雷达的常用波形,传统采用锁相合成技术的步进频穿墙成像雷达的跳频时间长,帧率很低,难以满足穿墙雷达实时成像的要求。为了解决这个问题,提出了一种新的扫描方案,可以通过现场可编程门阵列(FPGA)实现对扫描方式的可调控制,在不影响回波波形及成像效果的情况下显著提高了步进频穿墙成像雷达的帧率。在2 MHz的频率步长以及2.5 GHz的频段范围内时,实际成像帧率可以达到14 Hz,在一定程度上满足了实时成像的要求。试验测试结果验证了所提方法的可行性。
Stepped- frequency is a common waveform used in through- wall imaging radar( TWIR). Traditional stepped- frequency TWIR,which uses phase- locked loop( PLL) frequency synthesis technology,has a long frequency hopping time and low frame rate. It's difficult to meet the real time imaging demand of TWIR. To solve this problem,a novel scanning scheme is proposed in this paper,which can realize the adjustable control of scanning mode with Field Programmable Gate Array( FPGA). This scheme can evidently enhance the frame rate of TWIR without affecting echo waveform and imaging results. With step size equal to 2 MHz and frequency range equal to 2. 5 GHz,the actual frame rate of imaging can reach 14 Hz.The requirements of real time imaging can be satisfied to some extent. The feasibility of proposed approach has been proved through experiment.
Stepped- frequency is a common waveform used in through- wall imaging radar( TWIR). Traditional stepped- frequency TWIR,which uses phase- locked loop( PLL) frequency synthesis technology,has a long frequency hopping time and low frame rate. It's difficult to meet the real time imaging demand of TWIR. To solve this problem,a novel scanning scheme is proposed in this paper,which can realize the adjustable control of scanning mode with Field Programmable Gate Array( FPGA). This scheme can evidently enhance the frame rate of TWIR without affecting echo waveform and imaging results. With step size equal to 2 MHz and frequency range equal to 2. 5 GHz,the actual frame rate of imaging can reach 14 Hz.The requirements of real time imaging can be satisfied to some extent. The feasibility of proposed approach has been proved through experiment.
引文
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[10]Shima T,Miyanaga K,Takinami K.A 60 GHz PLL synthesizer with an injection locked frequency divider using a fast VCO frequency calibration algorithm[C]//Proceedings of 2012 Asia-Pacific Microwave Conference.Kaohsiung:IEEE,2012:646-648.
[2]金胜,朱天林,王海波.步进频雷达成像技术研究进展[J].飞行器测控学报,2013,32(6):490-495.JIN Sheng,ZHU Tianlin,WANG Haibo.Advances in Stepped-Frequency Radar Imaging Technology[J].Journal of Spacecraft TT&c Technology,2013,32(6):490-495.(in Chinese)
[3]Vadim M.Frequency Synthesizers Theory and Design[M].3rd ed.New York:John Wiley&Sons,Inc.,2005.
[4]杨檍,鲍景富.现代频率合成技术的研究进展[J].电讯技术,2007,47(2):1-5.YANG Yi,BAO Jingfu.Advances in modern frequency synthesis technology[J].Telecommunication Engineering,2007,47(2):1-5.(in Chinese)
[5]林志彬.超宽带步进频率脉冲雷达收发系统的设计与实现[D].长沙:国防科学技术大学,2010.LIN Zhibin.Design and Implementation of a Transceiver System for UWB Step-Frequency Pulse Radar[D].Changsha:National University of Defense Technology,2010.(in Chinese)
[6]吕波,孙江平,袁乃昌.改善锁相环跳频时间的方法研究[C]//全国微波毫米波会议论文集.宁波:中国电子学会,2007:690-693.LYU Bo,SUN Jiangping,YUAN Naichang.Research of Methods for Reducing PLL Switching time[C]//Proceedings of 2007 Microwave and Millimeter-wave Symposium of China.Ningbo:The Chinese Institute of Electronics,2007:690-693.(in China)
[7]Chenakin A.A broadband,low phase noise,fast switching PLL frequency synthesizer[C]//Proceedings of 2008IEEE International Frequency Control Symposium.Honolulu,HI,USA:IEEE,2008:758-761.
[8]Lou W,Geng Z,Feng P,et al.A fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system in 0.13μm CMOS[J].Journal of Semiconductors,2011,32(6):84-90.
[9]Gierlich R,Huttner J,Ziroff A,et al.Indoor positioning utilizing fractional-N PLL synthesizer and multi-channel base stations[C]//Proceedings of 2008 European Conference on Wireless Technology.Amsterdam,Netherlands:IEEE,2008:49-52.
[10]Shima T,Miyanaga K,Takinami K.A 60 GHz PLL synthesizer with an injection locked frequency divider using a fast VCO frequency calibration algorithm[C]//Proceedings of 2012 Asia-Pacific Microwave Conference.Kaohsiung:IEEE,2012:646-648.