基于混合逻辑动态模型的电力牵引传动系统硬件在环仿真
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  • 英文篇名:Hardware-in-the-loop Simulation for Electric Traction Drive Systems Based on Mixed Logical Dynamic Model
  • 作者:蒲俊楷 ; 葛兴来 ; 李官军
  • 英文作者:PU Junkai;GE Xinglai;LI Guanjun;Key Laboratory of Magnetic Suspension Technology and Maglev Vehicle, Ministry of Education (Southwest Jiaotong University);China Electric Power Research Institute;
  • 关键词:电力牵引传动系统 ; 硬件在环 ; 混合逻辑动态 ; 现场可编程门阵列
  • 英文关键词:electric traction drive system;;hardware-in the-loop;;mixed logical dynamic;;field-programmable gate array(FPGA)
  • 中文刊名:ZGDC
  • 英文刊名:Proceedings of the CSEE
  • 机构:磁浮技术与磁浮列车教育部重点实验室(西南交通大学);中国电力科学研究院;
  • 出版日期:2016-08-03 13:22
  • 出版单位:中国电机工程学报
  • 年:2017
  • 期:v.37;No.570
  • 基金:国家自然科学基金项目(51277153);; 国家电网公司科技项目(DG71-15-039)~~
  • 语种:中文;
  • 页:ZGDC201707023
  • 页数:11
  • CN:07
  • ISSN:11-2107/TM
  • 分类号:230-240
摘要
为涵盖牵引变流器所有可能开关状态以及进一步减小硬件在环(hardware-in-the-loop,HIL)仿真步长,该文提出一种基于混合逻辑动态(mixed logical dynamic,MLD)模型的电力牵引传动系统HIL仿真,并于现场可编程门阵列(field-programmable gate array,FPGA)上实现。结合开关器件驱动信号,推导不同电流、电压条件下的开关函数逻辑表达式,依此建立二重化单相脉宽调制(pulse width modulation,PWM)整流器和三相PWM逆变器的MLD模型。合理分配系统各模块计算顺序,使系统计算步长约束在500ns内。HIL仿真与Simulink仿真对比,结果验证了HIL仿真的正确性和有效性。相较于基于通用处理器的HIL仿真,MLD模型和FPGA的结合进一步减小了仿真步长,能及时反应开关动作。
        For accurate modeling of an electric traction drive system considering the traction converter's all possible switching states and smaller simulation step size, a hardware-in-the-loop(HIL) simulation approach based on mixed logical dynamic(MLD) model was proposed and implemented on a field programmable gate array(FPGA). The MLD models of the interlaced single-phase PWM(pulse-width modulation) rectifiers and the three-phase PWM inverter in the electric traction drive system were built based on the switching functions, which are the logical expressions under the current and voltage conditions. The simulation step size was limited in 500 ns by assigning appropriately the computation sequence of the discretized modules. The results of the HIL simulation compared with Simulink simulation demonstrate the validity of the proposed HIL simulation method. Compared to modeling on a general processor, modeling on a FPGA with MLD model further reduces the simulation step size and reacts fast to the switching signals.
引文
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