一种免滤波数字D类功率放大器功率级误差校正方法
|
摘要
针对免滤波数字D类功率放大器功率级非线性和电源噪声产生的误差,提出了一种基于前馈电源噪声抑制(FFPSNS)和局部闭环负反馈(LCLNF)技术的免滤波数字D类功率放大器桥接负载(BTL)功率级误差校正方法。该方法通过对BTL功率级构造一阶LCLNF回路,并在反馈回路中利用FFPSNS技术引入功率级电源噪声以在校正功率级误差的同时,进一步降低功率级电源噪声对功率放大器的输出影响。仿真结果表明,当功率放大器输入为频率1 kHz、幅度-5 dB的正弦信号时,与一阶LCLNF方法相比,所提出的方法可使功率放大器输出在800 Hz和1 200 Hz处的电源互调失真(PS-IMD)分量降低约15.6 dB(功率级电源噪声为频率200 Hz,幅度-40 dB的正弦波),功率放大器输出信噪比增加约为17 dB,从而使功率放大器达到较高的性能。
An error correction method was proposed,which was based on feed-forward power supply noise suppression(FFPSNS) and local closed loop negative feedback(LCLNF) techniques for correcting the errors caused by the non-linear and power supply noise of the bridge-tied-load(BTL) power stage of the filterless digital class D power amplifier. The method corrected the errors in the power stage by constructing the first-order LCLNF loop for the power stage and further reduced the impact of the power supply noise on the power amplifier output by using FFPSNS technology to introduce the power supply noise into the feedback loop at the same time. The simulation results show that when the input of the power amplifier is a sinusoidal signal with the frequency of 1 kHz and amplitude of-5 dB, with the proposed method the power supply induced inter-modulation distortion(PS-IMD) at 800 Hz and 1 200 Hz is reduced by approximately 15.6 dB(the power supply noise is a 200 Hz,-40 dB sinusoidal wave), and the output signal to noise ratio of the power amplifier is increased by about 17 dB compared with the first-order LCLNF method. Therefore, the power amplifier with the proposed method can achieve a better performance.
An error correction method was proposed,which was based on feed-forward power supply noise suppression(FFPSNS) and local closed loop negative feedback(LCLNF) techniques for correcting the errors caused by the non-linear and power supply noise of the bridge-tied-load(BTL) power stage of the filterless digital class D power amplifier. The method corrected the errors in the power stage by constructing the first-order LCLNF loop for the power stage and further reduced the impact of the power supply noise on the power amplifier output by using FFPSNS technology to introduce the power supply noise into the feedback loop at the same time. The simulation results show that when the input of the power amplifier is a sinusoidal signal with the frequency of 1 kHz and amplitude of-5 dB, with the proposed method the power supply induced inter-modulation distortion(PS-IMD) at 800 Hz and 1 200 Hz is reduced by approximately 15.6 dB(the power supply noise is a 200 Hz,-40 dB sinusoidal wave), and the output signal to noise ratio of the power amplifier is increased by about 17 dB compared with the first-order LCLNF method. Therefore, the power amplifier with the proposed method can achieve a better performance.
引文
[1] YU Z Q,WANG F Q,FAN Y Y.A power supply error correction method for single-ended digital audio class D amplifiers [J]. International Journal of Electronics,2016,103(12):2110-2124.
[2] 于泽琦. UPWM型数字D类音频功放关键技术研究 [D]. 西安:西北工业大学,2015.
[3] ZHENG H,ZHU Z M,MA R. A 0.02% THD and 80 dB PSRR filterless class D amplifier with direct lithium battery hookup in mobile application [J]. Journal of Semiconductors,2017,38(7):56-63.
[4] HE H,KANG Y,YU J,et al. A novel low-power high-efficiency 3-state filterless bang-bang class D amplifier [C] // Proceedings of IEEE International Conference on Electronics, Circuits, and Systems. Cairo,Egypt,2015:93-96.
[5] HE H,GE T,GUO L,et al. An investigation into the effect of carrier generators on power supply noise in PWM class D amplifiers [C] // Proceedings of the 57th International Midwest Symposium on Circuits & Systems. College Station,TX,USA,2014:266-269.
[6] CHOI Y,TAK W,YOON Y,et al. A 0.018% THD+N, 88-dB PSRR PWM class-D amplifier for direct battery hookup [J]. IEEE Journal of Solid-State Circuits,2012,47(2):454-463.
[7] DONIDA A,CELLIER R,NAGARI A,et al. A 40-nm CMOS, 1.1-V, 101-dB dynamic-range, 1.7-mW continuous-time ΣΔ ADC for a digital closed-loop class-D amplifier [J]. IEEE Transaction on Circuits and Systems:Ⅰ,2015,62(3):645-653.
[8] MOSTERT F,SCHINKEL D,GROOTHEDDE W,et al. A 5×80 W 0.004% THD+N automotive multiphase class-D audio amplifier with integrated low-latency ΔΣ ADCs for digitized feedback after the output filter [C] // Proceedings of IEEE International Solid-State Circuits Conference. San Francisco,CA,USA,2017:86-87.
[9] CHEN X,QU H,YU Z,et al. A filterless digital audio class-D amplifier based on grow-left double-edge pulse width modulation [C] // Proceedings of the 2nd International Conference on Integrated Circuits and Microsystems. Nanjing,China,2017:231-235.
[10] CELLIER R,PILLONNET G,ABOUCHI N,et al. Analysis and design of an analog control loop for digital input class D amplifiers [C] // Proceedings of the 18th International Conference on Electronics, Circuits, and Systems. Beirut,Lebanon,2011:105-108.
[11] YU Z Q,FAN Y Y,SHI L F,et al. A pseudo-natural sampling algorithm for low-cost low-distortion asymmetric double-edge PWM modulators [J]. Circuits, Systems, and Signal Processing,2015,34(3):831-849.
[12] 于泽琦,王凤琴,李祖贺,等. 一种改进的数字PWM发生器非线性误差预校正方法 [J]. 计算机应用研究,2017,34(2):453-457.YU Z Q,WANG F Q,LI Z H,et al. Improved nonli-near error precorrection method for digital PWM generators [J]. Application Research of Computers,2017,34(2):453-457(in Chinese).
[13] GE T,CHANG J S,SHU W. PSRR of bridge-tied load PWM class D amps [C] // Proceedings of IEEE International Symposium on Circuits and Systems. Seattle,WA,USA,2008:284-287.
[14] 何乐年,王忆. 模拟集成电路设计与仿真 [M]. 北京:科学出版社,2008:137-140.
[15] LEE J H,COPANI T,Jr MAYHUGH T,et al. A 280 mW, 0.07% THD+N class-D audio amplifier using a frequency-domain quantizer [J]. Analog Integrated Circuits and Signal Processing,2012,72(1):173-186.
[16] KUO T H,CHIEN S H,HUANG J J,et al. A 2.4 mA quiescent current, 1 W output power class-D audio amplifier with feed-forward PWM-intermodulated- distortion reduction [J]. IEEE Journal of Solid-State Circuits,2016,51(6):1436-1445.
[2] 于泽琦. UPWM型数字D类音频功放关键技术研究 [D]. 西安:西北工业大学,2015.
[3] ZHENG H,ZHU Z M,MA R. A 0.02% THD and 80 dB PSRR filterless class D amplifier with direct lithium battery hookup in mobile application [J]. Journal of Semiconductors,2017,38(7):56-63.
[4] HE H,KANG Y,YU J,et al. A novel low-power high-efficiency 3-state filterless bang-bang class D amplifier [C] // Proceedings of IEEE International Conference on Electronics, Circuits, and Systems. Cairo,Egypt,2015:93-96.
[5] HE H,GE T,GUO L,et al. An investigation into the effect of carrier generators on power supply noise in PWM class D amplifiers [C] // Proceedings of the 57th International Midwest Symposium on Circuits & Systems. College Station,TX,USA,2014:266-269.
[6] CHOI Y,TAK W,YOON Y,et al. A 0.018% THD+N, 88-dB PSRR PWM class-D amplifier for direct battery hookup [J]. IEEE Journal of Solid-State Circuits,2012,47(2):454-463.
[7] DONIDA A,CELLIER R,NAGARI A,et al. A 40-nm CMOS, 1.1-V, 101-dB dynamic-range, 1.7-mW continuous-time ΣΔ ADC for a digital closed-loop class-D amplifier [J]. IEEE Transaction on Circuits and Systems:Ⅰ,2015,62(3):645-653.
[8] MOSTERT F,SCHINKEL D,GROOTHEDDE W,et al. A 5×80 W 0.004% THD+N automotive multiphase class-D audio amplifier with integrated low-latency ΔΣ ADCs for digitized feedback after the output filter [C] // Proceedings of IEEE International Solid-State Circuits Conference. San Francisco,CA,USA,2017:86-87.
[9] CHEN X,QU H,YU Z,et al. A filterless digital audio class-D amplifier based on grow-left double-edge pulse width modulation [C] // Proceedings of the 2nd International Conference on Integrated Circuits and Microsystems. Nanjing,China,2017:231-235.
[10] CELLIER R,PILLONNET G,ABOUCHI N,et al. Analysis and design of an analog control loop for digital input class D amplifiers [C] // Proceedings of the 18th International Conference on Electronics, Circuits, and Systems. Beirut,Lebanon,2011:105-108.
[11] YU Z Q,FAN Y Y,SHI L F,et al. A pseudo-natural sampling algorithm for low-cost low-distortion asymmetric double-edge PWM modulators [J]. Circuits, Systems, and Signal Processing,2015,34(3):831-849.
[12] 于泽琦,王凤琴,李祖贺,等. 一种改进的数字PWM发生器非线性误差预校正方法 [J]. 计算机应用研究,2017,34(2):453-457.YU Z Q,WANG F Q,LI Z H,et al. Improved nonli-near error precorrection method for digital PWM generators [J]. Application Research of Computers,2017,34(2):453-457(in Chinese).
[13] GE T,CHANG J S,SHU W. PSRR of bridge-tied load PWM class D amps [C] // Proceedings of IEEE International Symposium on Circuits and Systems. Seattle,WA,USA,2008:284-287.
[14] 何乐年,王忆. 模拟集成电路设计与仿真 [M]. 北京:科学出版社,2008:137-140.
[15] LEE J H,COPANI T,Jr MAYHUGH T,et al. A 280 mW, 0.07% THD+N class-D audio amplifier using a frequency-domain quantizer [J]. Analog Integrated Circuits and Signal Processing,2012,72(1):173-186.
[16] KUO T H,CHIEN S H,HUANG J J,et al. A 2.4 mA quiescent current, 1 W output power class-D audio amplifier with feed-forward PWM-intermodulated- distortion reduction [J]. IEEE Journal of Solid-State Circuits,2016,51(6):1436-1445.