电阻负载型NMOS反相器输出低电平优化
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摘要
反相器是几乎所有数字集成电路设计的核心,然而在针对反相器设计的大量研究当中,对于电阻负载型NMOS反相器的参数对NMOS反相器在性能上的影响,很少被报道。基于此,利用Silvaco TCAD半导体器件仿真软件全面系统地分析了电阻型负载NMOS反相器器件参数,包括衬底掺杂浓度,栅氧化层厚度,晶体管导电沟道宽长比,电阻RL的阻值等,研究其对反相器输出低电平性能的影响。仿真结果表明,增加衬底掺杂浓度和P+区掺杂浓度可以改变阈值电压,优化电路的输出电平;增大栅氧化层的厚度也可同样实现对电阻型NMOS反相器输出电平的优化。
Inverters are the core of almost all digital integrated circuit designs. However, in a large number of researches on inverter designs, the influence of the parameters of resistance-loaded NMOS inverters on the performance of NMOS inverters is rarely reported. Based on this, Silvaco TCAD semiconductor device simulation software is used to comprehensively and systematically analyze the device parameters of resistive load NMOS inverter, including substrate doping concentration, gate oxide layer thickness, transistor conduction channel width-length ratio, resistance value of RL, etc., and to study its influence on inverter low-level output performance. The simulation results show that increasing the doping concentration of the substrate and the doping concentration of the P+region can change the threshold voltage and optimize the output level of the circuit. Increasing the thickness of the gate oxide layer can also optimize the output level of the resistive NMOS inverter.
Inverters are the core of almost all digital integrated circuit designs. However, in a large number of researches on inverter designs, the influence of the parameters of resistance-loaded NMOS inverters on the performance of NMOS inverters is rarely reported. Based on this, Silvaco TCAD semiconductor device simulation software is used to comprehensively and systematically analyze the device parameters of resistive load NMOS inverter, including substrate doping concentration, gate oxide layer thickness, transistor conduction channel width-length ratio, resistance value of RL, etc., and to study its influence on inverter low-level output performance. The simulation results show that increasing the doping concentration of the substrate and the doping concentration of the P+region can change the threshold voltage and optimize the output level of the circuit. Increasing the thickness of the gate oxide layer can also optimize the output level of the resistive NMOS inverter.
引文
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