AGC环路设计的Matlab-Simulink模型建模及验证
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摘要
基于Matlab-Simulink构建一个完整的自动增益控制环路(AGC)模型,并对模型进行了验证。该模型可从时间和功率幅度两个方面分析AGC控制过程,能够很好地显示和预测环路特性,从而可便捷地评估AGC环路是否满足系统的需求。在该模型的辅助下,以可变增益放大器、检波器、数/模转换器、模/数转换器与现场可编程门阵列为核心器件,实现了一种输入动态范围为-72～-12 dBm,输出动态范围为-19.7～-19.2 dBm际测试输出功率误差在1.3 dB以内,控制时间过程吻合,表明AGC环路的仿真和实测情况基本一致。
A complete automatic gain control(AGC)loop model based on the Matlab-Simulink is constructed and verified.The model can analyze the AGC control process from two respects of time amplitude and power amplitude,and well display and predict the loop feature,so as to conveniently evaluate whether the AGC loop can meet the requirements of the system. With the assist of the model,a high dynamic AGC loop with its input dynamic range of –72～–12 dBm and output dynamic range of–19.7～–19.2 dBm is implemented,taking the variable gain amplifier,radio detector,analog-to-digital converter,digital-to-ana-log converter and field programmable gate array(FPGA)as core devices. The output power difference of the loop simulation and actual test is less than 1.3 dB,and the control time processes are consistent,which indicates that the simulation results of the AGC loop are basically consistent with its actual test results.
A complete automatic gain control(AGC)loop model based on the Matlab-Simulink is constructed and verified.The model can analyze the AGC control process from two respects of time amplitude and power amplitude,and well display and predict the loop feature,so as to conveniently evaluate whether the AGC loop can meet the requirements of the system. With the assist of the model,a high dynamic AGC loop with its input dynamic range of –72～–12 dBm and output dynamic range of–19.7～–19.2 dBm is implemented,taking the variable gain amplifier,radio detector,analog-to-digital converter,digital-to-ana-log converter and field programmable gate array(FPGA)as core devices. The output power difference of the loop simulation and actual test is less than 1.3 dB,and the control time processes are consistent,which indicates that the simulation results of the AGC loop are basically consistent with its actual test results.
引文
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[10]KHOURY J M.On the design of constant settling time AGCcircuits[J].IEEE transactions on circuits and systems II:analog&digital signal processing,1998,45(3):283-294.
[2]池保勇,余志平,石秉学.CMOS射频集成电路分析与设计[M].北京:清华大学出版社,2006.CHI Baoyong,YU Zhiping,SHI Bingxue.Analysis and design of CMOS RF integated circuits[M].Beijing:Tsinghua University Press,2006.
[3]尹立贤.基于Simulink模拟与数字通信系统建模研究[J].信息化建设,2016(5):66.YIN Lixian.Modeling of analog and digital communication system based on Simulink[J].Informatization construction,2016(5):66.
[4]高颖,冯浩,张顺,等.基于Simulink的模拟与数字通信系统建模与仿真[J].现代电子技术,2013,36(7):64-67.GAO Ying,FENG Hao,ZHANG Shun,et al.Modeling and simulation of analog and digital communication systems based on Simulink[J].Modern electronics technique,2013,36(7):64-67.
[5]陈永森,吴海.基于Simulink的数字AGC系统设计与仿真[J].舰船电子对抗,2010,33(5):88-91.CHEN Yongsen,WU Hai.Design and simulation of digital AGC system based on Simulink[J].Shipboard electronic countermeasure,2010,33(5):88-91.
[6]Analog Devices Inc.AD8367:500MHz,linear-in-dB VGAwith AGC detector(Rev.A)[EB/OL].[2005-07-05].http://www.analog.com/media/en/technical-documentation/evaluationdocumentation/AD8367.pdf.
[7]Analog Devices Inc.AD8362:50 Hz to 3.8 GHz 65 dB TruPwr?detector(Rev.F)[EB/OL].[2016-09-15].https://www.analog.com/media/en/technical-documentation/data-sheets/AD8362.pdf.
[8]樊昌信,曹丽娜.通信原理[M].北京:国防工业出版社,2016.FAN Changxin,CAO Lina.Principles of communications[M].Beijing:National Defense Industry Press,2016.
[9]苏明.短波接收机前端大范围AGC控制电路的研制[D].武汉:武汉理工大学,2012.SU Ming.The design of the large range AGC control circuit in the front-end of short-wave receiver[D].Wuhan:Wuhan University of Technology,2012.
[10]KHOURY J M.On the design of constant settling time AGCcircuits[J].IEEE transactions on circuits and systems II:analog&digital signal processing,1998,45(3):283-294.