杂质分凝技术对肖特基势垒高度的调制
详细信息    查看全文 | 推荐本文 |
  • 英文篇名:Modulation of Schottky Barrier Height Using Silicidation Induced Dopant Segregation
  • 作者:毛淑娟 ; 罗军 ; 闫江
  • 英文作者:Mao Shujuan,Luo Jun,Yan Jiang(Institute of Microelectronics,Chinese Academy of Sciences,Beijing 100029,China)
  • 关键词:肖特基势垒高度 ; NiSi/n-Si肖特基二极管 ; 硅化诱发杂质分凝技术 ; 镍硅化物 ; 金属-半导体接触
  • 英文关键词:Schottky barrier height(SBH);NiSi/n-Si Schottky junction diode;silicidation induced dopant segregation(SIDS);NiSi;metal-semiconductor contact
  • 中文刊名:BDTJ
  • 英文刊名:Semiconductor Technology
  • 机构:中国科学院微电子研究所;
  • 出版日期:2013-01-03
  • 出版单位:半导体技术
  • 年:2013
  • 期:v.38;No.293
  • 基金:中国科学院微电子器件与集成技术重点实验室课题资助项目
  • 语种:中文;
  • 页:BDTJ201301016
  • 页数:5
  • CN:01
  • ISSN:13-1109/TN
  • 分类号:63-67
摘要
为降低金属或金属硅化物源漏与沟道的肖特基势垒高度以改善肖特基势垒源漏场效应晶体管(SBSD-MOSFET)的开关电流比(Ion/Ioff),采用硅化诱发杂质分凝技术(SIDS)调节NiSi/n-Si肖特基二极管(NiSi/n-Si SJD)的肖特基势垒高度,系统地研究了SIDS工艺条件如杂质注入剂量、注入能量和硅化物形成工艺对肖特基势垒高度调节的影响。实验结果表明,适当增加BF2杂质的注入剂量或能量均能显著提高有效电子势垒高度(φBn,eff),也即降低了有效空穴势垒高度(φBp,eff),从而减小反向偏置漏电流。同时,与传统的一步退火工艺相比,采用两步退火工艺形成NiSi也有利于提高有效电子势垒高度,减小反向漏电流。最后,提出了一种优化的调制肖特基势垒高度的SIDS工艺条件。
        It is well known that the Ion/Ioff ratio of Schottky barrier source/drain MOSFETs(SBSD-MOSFET)can be improved significantly by reducing the Schottky barrier height(SBH) at the metallic source/channel interface.The tuning of the SBH of NiSi/n-Si Schottky junction diodes(SJD)using silicidation induced dopant segregation(SIDS)was investigated extensively.The effects of implantion dose,energy and the silicidation conditions on the modulation of SBH were illustrated.The test results show that by increasing either the implantation dose or implantation energy of BF2,an obvious increase in the effective SBH to electrons(φBn,eff) was obtained,indicating the reduction of current at reverse bias and the decrease of the effective SBH to holes(φBp,eff).Meanwhile,It is revealed that the φBn,eff can be modulated to larger value in two-step annealing process than that in traditional one-step annealing process,and reducing the reverse leakage current.An optimized silicidation induced dopant segregation(SIDS)process for tuning the effective SBH of NiSi/n-Si SJDS was proposed.
引文
[1]LU W Y,TAUR Y.On the scaling limit of ultrathin SOIMOSFETs[J].IEEE Transactions on Electron Devices,2006,53(5):1137-1141.
    [2]FRANK D J,DENNARD R H,NOWAK E,et al.Device scaling limits of Si MOSFETs and their applicationdependencies[J].Proc IEEE,2001,89:259-288.
    [3]TAUR Y,BUCHANAN D A,CHEN W,et al.CMOS scaling into the nanometer regime[C]//Proc IEEE,1997,85(4):486-504.
    [4]SWIRHUN S E,SANGIORGI E,WEEKS A J,et al.A VLSI-suitable Schottky-barrier CMOS process[J].IEEE Journal of Solid-State Circuits,1985,20(1):114-122.
    [5]KINOSHITA A,TSUCHIYA Y,YAGISHITA A,et al.Solution for high performance Schottky-source/drain MOSFETs:Schottky barrier heigh engineering with dopant segregation technique[C]//Proceedings of VLSI Symp Tech Dig.Honolulu,USA,2004:168-169.
    [6]ZHANG M,KNOCH J,ZHAO Q T,et al.Schottky barrier height modulation using dopant segregation in Schottky-barrier SOI-MOSFET[C]//Proceedings of ESSDERC.Grenoble,France,2005:457-460.
    [7]LUO J,QIU Z J,ZHANG D W,et al.Effects of carbon on Schottky barrier heights of NiSi modified by dopant segregation[J].IEEE Electron Device Letter,2009,30(6):608-610.
    [8]SHANG H P,XU X Q.SBH adjustment characteristic of the dopant segregation process for NiSi/n-Si SJDs[J].Journal of Semiconductors,2010,31(5):139-144.
    [9]TAO M,UDESHI U,BASIT B,et al.Removal of dangling bonds and surface states on silicon(001)with a monolayer of selenium[J].Applied Physics Letters,2003,82(10):1159-1561.
    [10]IKEDA K,YAMASHITA Y,ENDOH A,et al.Schottky-barrier-height engineering for strained-Si MOSFETs[C]//Proceedings of the62 nd Device Research Conference.Indiana,USA,2004:111-112.
    [11]LUO J,QIU Z J,ZHANG Z,et al.Interaction of NiSi with dopants for metallic source/drain applications[J].Journal of Vacuum Science&Technology:B,2010,28(1):1-11.
    [12]施敏.半导体器件物理[M].陕西:西安交通大学出版社,2008:103-149.
    [13]XIONG S,KING T J,BOKOR J.A comparison study of symmetric ultrathin-body double-gate devices with metal S/D and doped S/D[J].IEEE Transaction Electron Devices,2005,52(8):1859-1967.
    [14]BLUM I,PORTAVOCE A,CHOW L,et al.B diffusion in implanted Ni 2 Si and NiSi layers[J].Applied Physics Letters,2010,96(7):352-356.
    [15]JIANG Y L,RU G P,QU X P,et al.Study of NiSi/Si interface by cross-section trasmission[J].Journal of Semiconductors,2006,27(2):223-227.

© 2004-2018 中国地质图书馆版权所有 京ICP备05064691号 京公网安备11010802017129号

地址:北京市海淀区学院路29号 邮编:100083

电话:办公室:(+86 10)66554848;文献借阅、咨询服务、科技查新:66554700