一种基于Cache加速的SPI Flash控制器功能验证与性能评估
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摘要
和并行Flash相比,SPI Flash由于小巧灵活、低成本、高效的特点,在嵌入式SoC系统中的运用日益广泛。随着对嵌入式处理器性能需求的提升,SPI串行接口及Flash较慢的读取速度与处理器执行速度之间的差距逐渐增大。由于SPI Flash在嵌入式系统中通常用于存储程序固件(firmware),利用程序执行的局部性原理,在SPI Flash控制器中引入Cache模块优化程序读取的性能,成为较为常见的一种优化方法。本文介绍了一种基于Cache加速的SPI Flash控制器的功能验证和性能评估工作。提出的测试平台(Testbench)不仅验证了SPI Flash控制器功能的正确性,并且在SoC芯片的特定应用场景下,对不同组织架构的Cache设计性能进行了评估。为设计在功耗,面积,性能之间权衡取舍优化提供了重要参考。
Compared with parallel flash, SPI flash is compact, low-cost, and efficient. It' s commonly used in embedded SoC systems. With the demand for higher performance, SPI interface and flash are not fast enough compared to increasing CPU frequency. Because SPI flash is mainly used to store firmware, to which principle of locality applies,cache can be integrated into SPI flash controller to optimize read performance. The procedure and method to verify functionality and evaluate performance of a cache enhanced SPI flash controller are introduced. The proposed testbench is used to verify the function of the design, and is used for evaluating the cache performance of different architecture in different SoC application scenario. The results provided by the verification process are crucial reference data, used by the designer of the SPI controller to do the trade-off between power, area and performance.
Compared with parallel flash, SPI flash is compact, low-cost, and efficient. It' s commonly used in embedded SoC systems. With the demand for higher performance, SPI interface and flash are not fast enough compared to increasing CPU frequency. Because SPI flash is mainly used to store firmware, to which principle of locality applies,cache can be integrated into SPI flash controller to optimize read performance. The procedure and method to verify functionality and evaluate performance of a cache enhanced SPI flash controller are introduced. The proposed testbench is used to verify the function of the design, and is used for evaluating the cache performance of different architecture in different SoC application scenario. The results provided by the verification process are crucial reference data, used by the designer of the SPI controller to do the trade-off between power, area and performance.
引文
[1]通用SPI Flash控制器的设计与验证[J]罗莉;夏军;邓宇计算机工程2011-08.
[2]用于SoC的SPI接口设计与验证匡春雨;马琪;陈科明现代电子技术2013-24.
[3] Andes Technology Corporation Product Selector Guide PRE133_V1.0. Andes Technology Corporation2017.
[4]基于VMM的L2 Cache的验证平台的设计与实现翟江涛;潘明;苏雪现代电子技术2015-04.
[5]基于UVM的SPI总线控制器验证齐宇心科技风2016-04.
[2]用于SoC的SPI接口设计与验证匡春雨;马琪;陈科明现代电子技术2013-24.
[3] Andes Technology Corporation Product Selector Guide PRE133_V1.0. Andes Technology Corporation2017.
[4]基于VMM的L2 Cache的验证平台的设计与实现翟江涛;潘明;苏雪现代电子技术2015-04.
[5]基于UVM的SPI总线控制器验证齐宇心科技风2016-04.