基于HLS的SAR回波模拟硬件加速设计
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摘要
针对合成孔径雷达(SAR)回波模拟的实时性需求,提出了一种基于高层次综合(HLS)的回波模拟硬件加速系统。实时性是衡量回波模拟系统性能的重要指标,随着成像区域复杂度、成像质量要求等不断提高,回波模拟的计算复杂度急剧增加,模拟过程耗时巨大。将FPGA应用于SAR回波生成硬件加速,并引入高层次综合方法,解决了传统硬件开发的算法转换繁琐、不支持浮点运算等关键问题,经过验证能达到较高的性能与精度,保证了回波模拟的实时性,具有较高的应用价值。
Aimed at real-time demand of synthetic aperture radar(SAR)echo simulation,an echosimulation hardware acceleration system based on High Level Synthesis is proposed. Real-time is a significant indicator to measure the performance if echo simulation system. Along with the complexity of imaging area and requirements of imaging quality continue to increase,a sharp increase in computational complexity appears and echo simulation becomes time-consuming. Therefore,Field Programmable Gate Array(FPGA) is used in hardware acceleration of SAR echo generation,and High Level Synthesis method was introduced. Key issues such as cumbersome algorithms convert and unsupported floatingpoint operations in traditional hardware development are solved. It's proven that the design could achieve higher performance and accuracy,ensure real-time echo simulation,and has a high application value.
Aimed at real-time demand of synthetic aperture radar(SAR)echo simulation,an echosimulation hardware acceleration system based on High Level Synthesis is proposed. Real-time is a significant indicator to measure the performance if echo simulation system. Along with the complexity of imaging area and requirements of imaging quality continue to increase,a sharp increase in computational complexity appears and echo simulation becomes time-consuming. Therefore,Field Programmable Gate Array(FPGA) is used in hardware acceleration of SAR echo generation,and High Level Synthesis method was introduced. Key issues such as cumbersome algorithms convert and unsupported floatingpoint operations in traditional hardware development are solved. It's proven that the design could achieve higher performance and accuracy,ensure real-time echo simulation,and has a high application value.
引文
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[13]Wang B,Hu Z,Guan W,et al.Study on the echosignal model and R-D imaging algorithm for FM-CW SAR[C]//IET International Radar Conference2015.Nanjing,China:IET,2015:1-6.
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[15]黄艳,张永利,刘志铭.一种基于点目标的雷达影像质量评价方法[J].测绘工程,2012,21(1):30-31,33,38.
[16]谢周标,周毅,龙斌,等.二维椭圆硬件加速算法研究及其FPGA实现[J].计算机工程与应用,2015(3):45-49,60.
[2]张顺生,陆逸,曹建蜀,等.一种基于RD成像逆处理的双基地SAR回波模拟算法[J].信号处理,2013,29(3):336-341.
[3]杜静,敖富江,黄赪东,等.SAR成像并行仿真的访存局部性优化技术[J].计算机应用与软件,2014,(2):241-244,252.
[4]景国彬,张云骥,李震宇,等.基于GPU的SAR回波仿真高效实现方法[J].系统工程与电子技术,2016,38(11):2493-2498.
[5]Sukhwani B,Thoennes M,Hong Min,et al.Ahardware/software approach for database queryacceleration with FPGAs[J].International Journalof Parallel Programming,2015,43(6):1129-1159.
[6]Cardarilli G C,Carlo L D,Alberto N,et al.Aframework for dynamically-loaded hardware library(HLL)in FPGA acceleration[C]//2015 IEEE Inter-national Symposium on Signal Processing and Infor-mation Technology.Abu Dhabi,UAE:IEEE,2015:291-296.
[7]QI Peng,WEI Zhang,ZONG Zhu-lin.Design andimplementation of fast SAR echo simulation basedon FPGA[C]//9th European Conference on Synthet-ic Aperture Radar.Nuremberg,Germany:VDE,2012:344-347.
[8]Hoare R R,Smetana D.Accelerating SAR process-ing on COTS FPGA hardware using C-to-gates de-sign tools[C]//2014 IEEE High Performance Ex-treme Computing Conference.Waltham,MA,USA:IEEE,2014:1-6.
[9]Nane R,Sima V,Pilato C,et al.A survey and evaluation of FPGA High-Level Synthesis tools[J].IEEE Trans.on Computer-Aided Design of Inte-grated Circuits and Systems,2016(99):1.
[10]陈宏铭,李蕾,姚益武,等.基于AXI总线串行Rapid IO端点控制器的FPGA实现[J].北京大学学报(自然科学版),2014,50(4):697-703.
[11]谢矿生.基于回波数据压缩的MIMO-SAR成像方法[J].电讯技术,2015,55(3):233-237.
[12]DAI S,TAN Ming-xing,HAO Ke-cheng,et al.Flushing-enabled loop pipelining for high-levelsynthesis[C]//2014 51st ACM/EDAC/IEEE DesignAutomation Conference.San Francisco,CA,USA:ACM,2014:1-6.
[13]Wang B,Hu Z,Guan W,et al.Study on the echosignal model and R-D imaging algorithm for FM-CW SAR[C]//IET International Radar Conference2015.Nanjing,China:IET,2015:1-6.
[14]Windham K,Goodman N A.Preliminary results onsubsampling effects on range migration correctionin SAR imaging[C]//2014 IEEE Radar Conference.Cincinnati,OH,USA:IEEE,2014:1418-1423.
[15]黄艳,张永利,刘志铭.一种基于点目标的雷达影像质量评价方法[J].测绘工程,2012,21(1):30-31,33,38.
[16]谢周标,周毅,龙斌,等.二维椭圆硬件加速算法研究及其FPGA实现[J].计算机工程与应用,2015(3):45-49,60.