基于Cortex嵌入式多处理器系统的图像中值滤波算法并行化的研究
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摘要
嵌入式系统在图像处理、空间计算等领域越来越广泛,如何在功耗、成本和计算能力三个主要方面取得平衡,利用多核和多处理器系统以并行计算方式提高嵌入式系统计算能力是一种有效的解决方案.讨论了基于Cortex嵌入式多处理器系统的基本结构,并在该系统上进行图像中值滤波算法的并行化研究.实验结果分析表明,在该嵌入式多处理器平台上配合并行算法能够成倍提高图像中值滤波的运行性能.
Embedded system has become more and more popular in image processing, spatial computing and other fields. In order to achieve a balance in three major aspects of power consumption, cost and computing power, it is an effective solution to improve the computing ability of embedded system, using the multi-core and multi processor system based on parallel computing method. This paper discusses the basic structure of embedded multi processor system based on Cortex, and has a research on parallel image median filtering algorithm on this system. Experimental results show that the parallel algorithm can improve the performance of image median filtering exponentially on the embedded multi processor platform.
Embedded system has become more and more popular in image processing, spatial computing and other fields. In order to achieve a balance in three major aspects of power consumption, cost and computing power, it is an effective solution to improve the computing ability of embedded system, using the multi-core and multi processor system based on parallel computing method. This paper discusses the basic structure of embedded multi processor system based on Cortex, and has a research on parallel image median filtering algorithm on this system. Experimental results show that the parallel algorithm can improve the performance of image median filtering exponentially on the embedded multi processor platform.
引文
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15 李元帅,张勇,周国忠,等.图像中值滤波硬件算法及其在FPGA中的实现.计算机应用,2006,26(6):62–63.
16 董付国,原达,王金鹏.中值滤波快速算法的进一步思考.计算机工程与应用,2007,43(26):48–49.
17 王宇新,贺圆圆,郭禾,龙珠.基于FPGA的快速中值滤波算法.计算机应用研究,2009,26(1):224–226.
2 Kalla R.IBM power5 chip:A dual-core multithreaded processor.IEEE Micro,2004,24(20):40–47.
3 Mladen B,Hans JS,Peter P.Multicore system-onchip architecture for MPEG-4 streaming video.IEEE Trans.on Circuits and Systems for Video Technology,2002,12(8):688 –699.
4 Lee TY,Fan YH,Cheng YM,et al.Hardware oriented partition for embedded multiprocessor FPGA system.Proc.of the 2nd International Conference on Innovative Computing,Information and Control(ICICIC 2007).Kumamoto,Japan.2007.
5 Toledo F,Martinez J,Ferrandez J.FPGA-based platform for image and video processing embedded systems.Proc.of the2007 3rd Southern Conference on Programmable Logic(SPL’07).2007.171–176.
6 Li Y,Wang ZY,Zhao XM,et al.Design of a low-power embedded processor architecture using asynchronous function units.Lecture Notes in Computer Science,2008:354–363.
7 Yan LK,Shi QS,Chen TZ,et al.An on-chip communication mechanism design in the embedded heterogeneous multi-core architecture.Proc.of the 2008 IEEE Internation Conference on Networking,Sensing and Control(ICNSC).2008.1842–1845.
8 Park GH,Lee KW,Han TD,et al.Cooperative cache system:A low power cache system for embedded processor.IEICE Trans.on Electronics,2007,E90-C(4):708–717.
9 李哲,慕德俊,郭蓝天,黄兴利,李刘涛.嵌入式多处理器系统混合调度机制的研究.西北工业大学学报,2015,01:50–56.
10 张天凡.基于Cortex嵌入式架构的智能储物管理系统[硕士学位论文].武汉:武汉大学,2012:10–12,33,56–60.
11 Gonzalez RC,Woods RE.Digital Image Processing.Prentice Hall,2010:178–179.
12 董付国,范辉,原达.一种新的图像中值滤波并行算法.计算机科学,2007,34(12):99–101.
13 张丽,陈志强,高文焕.均值加速的快速中值滤波算法.清华大学学报,2004,44(9):1157–1159.
14 朱捷,朱小娟,贺明.基于FPGA的实时性图像处理器中值滤波器设计实现.计算机测量与控制,2007,15(6):789–800.
15 李元帅,张勇,周国忠,等.图像中值滤波硬件算法及其在FPGA中的实现.计算机应用,2006,26(6):62–63.
16 董付国,原达,王金鹏.中值滤波快速算法的进一步思考.计算机工程与应用,2007,43(26):48–49.
17 王宇新,贺圆圆,郭禾,龙珠.基于FPGA的快速中值滤波算法.计算机应用研究,2009,26(1):224–226.